Coded data generation or conversion – Sample and hold
Patent
1997-06-12
1999-03-02
Williams, Howard L.
Coded data generation or conversion
Sample and hold
341118, 348294, 382312, H04N 140, H03M 146
Patent
active
058777156
ABSTRACT:
Disclosed is a circuit for performing correlated double sampling entirely in the digital domain. In an exemplary embodiment, the circuit includes a plurality of comparators, each having a first input coupled to an associated data line for receiving first and second signals in first and second sampling intervals, respectively. A time varying reference signal is applied to the second input of each comparator. A plurality of up/down counters are coupled to respective ones of the comparators, and each is operable to count in a first direction during the first sampling interval and in an opposite direction during the second sampling interval. Each up/down counter is caused to stop counting when the amplitude of the variable reference signal substantially equals the amplitude of the respective first or second signal. As a result, each up/down counter provides an output representing a subtraction of one of said first or second signals from the other. The invention has particular utility when used in conjunction with a CMOS image sensor.
REFERENCES:
patent: 3668690 (1972-06-01), Ormond
patent: 4023160 (1977-05-01), Kirschner
patent: 4523101 (1985-06-01), Tsunekawa
patent: 5027117 (1991-06-01), Yoshida et al.
patent: 5708471 (1998-01-01), Okumura
Gowda Sudhir Muniswamy
Shin Hyun Jong
Wong Hon-Sum Philip
Xiao Peter Hong
Yang Jungwook
International Business Machines - Corporation
Jean-Pierre Peguy
Williams Howard L.
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