Correlated double sampling ping-pong architecture with...

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

Reexamination Certificate

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C341S144000, C348S241000

Reexamination Certificate

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07453389

ABSTRACT:
A method and apparatus can be arranged with a correlated double sampler circuit (CDS) for processing an output signal from an imaging device such as a charge-coupled device (CCD) image sensor. The CDS circuit includes an amplifier, a set of capacitors that are dynamically configured for sampling and holding operations, and a reduced number of capacitive digital-to-analog converter (CDAC) circuits, all arranged in a ping-pong architecture. The described ping-pong architecture is useful in digital imaging applications such as digital scanners, digital copiers, digital cameras, and digital camcorders, to name a few.

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patent: 6018364 (2000-01-01), Mangelsdorf
patent: 6342919 (2002-01-01), Opris
patent: 6587143 (2003-07-01), Boisvert
patent: 7236117 (2007-06-01), Varma et al.
patent: 7274009 (2007-09-01), Huang et al.
patent: 7336123 (2008-02-01), Yoshida et al.
LM98714 Three Channel, 16-Bit, 45 MSPS Digital Copier Analog Front End with Integrated CCD/CIS Sensor Timing Generator and LVDS Output,National Semiconductor Corporation, Oct. 2006, pp. 1-12.

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