Television – Camera – system and detail – Solid-state image sensor
Reexamination Certificate
2000-03-30
2004-05-11
Vu, Ngoc-Yen (Department: 2615)
Television
Camera, system and detail
Solid-state image sensor
C348S241000, C250S208100
Reexamination Certificate
active
06734908
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a correlated double sampling circuit having a clamping circuit and a sample hold circuit and to an amplification type solid state imaging device employing the correlated double sampling circuit.
Conventionally, as an amplification type solid state imaging device, there has been proposed one that does not read a signal charge itself generated in each pixel but operates to convert the signal charge into a voltage signal (or a current signal) inside the pixel, amplify the signal and thereafter read the voltage signal (or the current signal) by means of a scanning circuit. The pixel section of this amplification type solid state imaging device is classified into a horizontal type in which a photoelectric conversion section and an amplifying section are arranged in a planar style and a vertical type in which a photoelectric conversion section and an amplifying section are arranged in a cubic style.
As an amplification type solid state imaging device of the aforementioned horizontal type, there is known one of the APS (Active Pixel Sensor) type shown in FIG.
14
. Referring to
FIG. 14
, a signal charge generated in a photoelectric conversion section
101
is transferred to a gate of a transistor
103
via a transistor
102
to a gate of which a voltage &phgr;
T
is applied and made to be a voltage signal. The transistor
103
executes impedance conversion (current amplification) to read a signal V
sig
via a pixel selecting switch
104
to a gate of which a voltage &phgr;
X
is applied. Immediately before or after reading this signal V
sig
, the signal charges accumulated in the gate of the transistor
103
are discharged to a power voltage V
D
side by a reset transistor
105
to a gate of which a voltage &phgr;
R
is applied.
As an amplification type solid state imaging device of the vertical type, one of the CMD (Charge Modulation Device) type shown in
FIG. 15
is known. Referring to
FIG. 15
, in a transistor
111
, signal charges generated through the photoelectric conversion are accumulated under the gate. Subsequently, by applying a read voltage &phgr;
X
to the gate of the transistor
111
, a change in the characteristics of the transistor
111
due to the signal charges is read as the output signal V
sig
. Thus, the transistor
111
executes the photoelectric conversion, amplification and pixel selection. A reset operation is achieved by discharging the signal charges to the substrate side with a voltage &phgr;
R
that is sufficiently higher than in the reading stage applied to the gate. Therefore, a three-valued voltage pulse &phgr;
X
/&phgr;
R
is necessary for driving.
The pixel section of each of the aforementioned amplification type solid state imaging devices shown in FIG.
14
and
FIG. 15
is represented by a common schematic diagram as shown in FIG.
16
. In
FIG. 16
, the reference numeral
131
denotes a pixel section for executing the operations of photoelectric conversion, reading and resetting. The reading of the pixel section
131
is controlled by the voltage &PHgr;
X
of a signal line
106
, and the resetting is controlled by the voltage &PHgr;
R
of a signal line
107
. Then, the pixel section
131
outputs the amplified signal V
sig
via a vertical signal line
108
.
FIG. 17
shows a schematic view of an amplification type solid state imaging device (two-dimensional image sensor) employing the aforementioned pixel section. Referring to
FIG. 17
, a two-dimensional pixel region
140
is constructed of the pixel sections
131
, a first vertical scanning circuit
141
and a second vertical scanning circuit
142
. The read operation of the pixel section
131
is controlled by a signal
143
from the first vertical scanning circuit
141
, while the resetting operation is controlled by a signal
144
from the second vertical scanning circuit
142
. An output signal of the pixel section
131
is outputted to a vertical signal line
145
and thereafter conducted to a correlated double sampling circuit provided for each vertical signal line
145
. A difference between a light-receiving signal obtained in a reading stage and a reference signal after the resetting is outputted from the correlated double sampling circuit. In is herein noted that the light-receiving signal and the reference signal possibly take either one of two cases depending on which one comes first. According to the output of the difference, the variation in a threshold value per pixel section
131
is canceled, by which a fixed pattern noise (referred to as FPN hereinafter) of each pixel section
131
is suppressed. It is to be noted that the aforementioned correlated double sampling circuit is constructed of a clamping circuit (a clamping capacitor
146
and a clamping switch
147
) and a sample hold circuit (a sample hold switch
148
and a sample hold capacitor
149
).
In the aforementioned correlated double sampling circuit, the vertical signal line
145
is connected to the sample hold switch
148
via the clamping capacitor
146
and connected to a clamping potential V
CP
via the clamping switch
147
. The clamping operation to the clamping potential V
CP
is executed by making a pulse &phgr;
C1
have high level in the reading stage of the light-receiving signal from the pixel section
131
. The sample hold operation is executed by making a pulse &phgr;
S1
have high level in the reading stage of the reference signal from the pixel section
131
. Then, the signal from the sample hold switch
148
is held in the sample hold capacitor
149
and amplified by an amplifier circuit
155
. The signal amplified by the amplifier circuit
155
is conducted to a horizontal signal line
164
via a horizontal selection switch
156
controlled by a signal
161
from a horizontal scanning circuit
160
, while the horizontal signal line
164
outputs a signal OS via an amplifier circuit
169
.
As described above, according to the amplification type solid state imaging device (two-dimensional image sensor) shown in
FIG. 17
, the correlated double sampling circuit provided for each vertical signal line
145
suppresses the FPN caused by the variation in the threshold value per pixel section
131
. However, the amplifier circuit
155
provided for each vertical signal line
145
is accompanied by variations in an offset level and gain. The variations, which are random in the horizontal direction and common in the vertical direction of the image, causes a significant vertical-stripe-shaped FPN in terms of a video image, significantly impairing the image quality. Furthermore, the horizontal selection switch
156
is accompanied by variations in conductance, and this becomes a factor of the vertical-stripe-shaped FPN.
As a method for solving the aforementioned vertical-stripe-shaped FPN, there has been proposed the amplification type solid state imaging device (two-dimensional image sensor) shown in
FIG. 18
(Japanese Patent Laid-Open Publication No. HEI 10-173997). In this amplification type solid state imaging device, the two-dimensional pixel region has the same construction as the pixel region
140
shown in
FIG. 17
, and therefore, neither drawing nor description is provided for the region. The correlated double sampling circuit provided for each vertical signal line
145
has the same construction as that shown in
FIG. 17. A
difference to the amplification type solid state imaging device shown in
FIG. 17
is that the amplifier circuit
155
provided for each vertical signal line
145
has two inputs, one being a signal
153
from the correlated double sampling circuit and the other being a reference voltage signal V
ref
. Furthermore, a second CDS (correlated double sampling) circuit
168
is provided at the terminal of the horizontal signal line
164
.
In the amplification type solid state imaging device (two-dimensional image sensor) having the aforementioned construction, signals from the amplifier circuits
155
are sequentially read to the horizontal signal line
164
by the switches
156
driven by a pulse &phgr;
H
(j) or the like
Koyama Eiji
Watanabe Takashi
Conlin David G.
Edwards & Angell LLP
Long Heather R.
Sharp Kabushiki Kaisha
Tucker David A.
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