Corner protection to reduce wrap around

Details Corner protection to reduce wrap around Corner protection to reduce wrap around

2005-03-08

2005-03-08

Zarneke, David (Department: 2829)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

C438S424000, C438S595000, C438S780000

Reexamination Certificate

active

06864148

ABSTRACT:
A method and structure are provided with reduced gate wrap around to advantageously control for threshold voltage and increase stability in semiconductor devices. A spacer is provided aligned to field dielectric layers to protect the dielectric layers during subsequent etch processes. The spacer is then removed prior to subsequently forming a part of a gate oxide layer and a gate conductor layer. Advantageously, the spacer protects the corner area o the field dielectric and also allows for enhanced thickness of the gate oxide near the corners.

REFERENCES:
patent: 5741738 (1998-04-01), Mandelman et al.
patent: 6184071 (2001-02-01), Lee
patent: 6746935 (2004-06-01), De Coster et al.

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