Corner buffer system for improved memory read efficiency during

Computer graphics processing and selective visual display system – Computer graphic processing system – Integrated circuit

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345430, 345509, 345521, G09G 536

Patent

active

060846011

ABSTRACT:
A corner buffer system for improving memory read efficiency during the process of determining a bilinearly interpolated texel value corresponding to a pixel. The corner buffer system includes a conditional texel quad transposer, a conditional s,t fraction complementer and a corner buffer unit. Addresses for data words corresponding to each texel in a texel quad are received, as well as the two LSBs of the s,t coordinates for at least one of the four texels in the quad. The conditional texel quad transposer routes the texel addresses to first, second, third and fourth outputs according to the values of the LSBs of the s,t coordinates of each texel. The conditional s,t fraction complementer receives the fractional parts of the s,t coordinates of the pixel and conditionally complements them responsive to the state of the LSBs of the s,t coordinates of one of the four texels. The corner buffer unit has four address inputs and includes four sets of address storage registers and data storage registers. Each address input and register set is associated with a corner of the texel quad. At each corner, the address storage register is associated with a corresponding data storage register. Comparators determine, for each corner, whether the address presented at the address input is equal to the address stored for that corner. If they are not equal, texel data corresponding to the non-matching input address is retrieved and stored in the data storage register for that corner.

REFERENCES:
patent: 5886706 (1999-03-01), Alcorn et al.

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