Coreless package substrate with conductive structures

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration

Reexamination Certificate

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Details

C257S775000, C257S786000, C257SE23011, C257SE23145, C361S748000, C361S777000, C174S262000, C174S263000

Reexamination Certificate

active

07626270

ABSTRACT:
A method of manufacturing a coreless package substrate together with a conductive structure of the substrate is disclosed. The method can produce a coreless package substrate which comprises: at least a built-up structure having a first solder mask and a second solder mask, wherein a plurality of openings are formed in the first and second solder mask to expose the conductive pads of the built-up structure; and a plurality of solder bumps as well as solder layers formed on the conductive pads. Therefore, the invention can produce the coreless package substrate with high density of circuit layout, less manufacturing steps, and small size.

REFERENCES:
patent: 2004/0150112 (2004-08-01), Oda
patent: 2004/0159951 (2004-08-01), Toyoda et al.
patent: 2006/0121719 (2006-06-01), Nakamura et al.
patent: 2006/0223236 (2006-10-01), Nomura et al.

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