Core memory phaser driver

Details Core memory phaser driver Core memory phaser driver

1976-01-21

1977-08-16

Moffitt, James W.

Electrical transmission or interconnection systems

Anti-induction or coupling to other systems

333 241, H01P 132

Patent

active

040428311

ABSTRACT:
A ferrite phaser driver circuit for phased array antennas wherein the input data is stored and subsequently fed to a ferrite phaser which has been immediately reset through a one-shot circuit configuration having means for compensating for power supply variations such that if the voltage drops, for example, the set period is lengthened automatically for a predetermined data input period. Additionally, the input data is adapted to be compressed in time when storing the data which becomes desirable when the input data is multiplexed where, for example, the arry is in the form of a matrix and the data input is applied for storage in rows and transferred to the respective phasers in columns.

REFERENCES:
patent: 3835397 (1974-08-01), D'Antonio
patent: 3988686 (1976-10-01), Beall

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