Electrical computers and digital processing systems: processing – Processing architecture – Microprocessor or multichip or multimodule processor having...
Reexamination Certificate
2007-08-07
2007-08-07
Kim, Kenneth S. (Department: 2111)
Electrical computers and digital processing systems: processing
Processing architecture
Microprocessor or multichip or multimodule processor having...
C712S028000
Reexamination Certificate
active
11325736
ABSTRACT:
A coprocessor instruction interface is described which provides a flexible degree of coupling with a host control processor. Specific methods are defined for architectures to make use of multiple coprocessing instruction interfaces with a single coprocessor for supporting client-server coprocessors (CSCOPs). A dynamic debug interface is used in each coprocessor instruction interface to support tightly coupled, loosely coupled and firmly coupled operation of the single conprocessor for a corresponding coupled control processor.
REFERENCES:
patent: 5960209 (1999-09-01), Blount et al.
patent: 6829697 (2004-12-01), Davis et al.
patent: 2003/0148793 (2003-08-01), Sundararajan et al.
patent: 2006/0029038 (2006-02-01), Jungck
Altera Corporation
Kim Kenneth S.
Priest & Goldstein PLLC
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