Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
1998-06-25
2002-11-26
Loke, Steven (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257S040000, C257S077000, C257S520000, C257S642000
Reexamination Certificate
active
06486559
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a copper wiring structure for use in a semiconductor device and a method of fabricating the same.
2. Description of the Related Art
The art for fabricating fine and highly integrated semiconductor devices has been industriously developed in resent years. Semiconductor devices currently used are fabricated in a dimensional order of about 0.13 &mgr;m. Semiconductor devices, for example a memory device, such as 4 gigabit DRAM or a logic devices, use design standards based on this size and are under research and development.
Three dimensional stacks of the highly integrated semiconductor elements are being investigated along with fabricating a highly integrated two dimensional device with a fine construction. For this purpose, a multilayer interconnection technology with a fine construction has became most important. In the multilayer interconnection technology, a crucial problem is to select conductive materials used for wiring and insulation materials for use as interlayer insulation films between the wiring layers.
A wiring with aluminum (Al) alloys is mainly used as wiring layers in the currently available semiconductor devices. However, the copper wiring is being investigated and developed as a candidate for the fine wiring layer to be used in the future since it has a lower electric resistance than the aluminum (Al) wiring. As for a copper wiring structure, investigation has been mainly directed toward about a wiring structure in grooves in which a copper material is buried into a wiring groove, which is disclosed, for example, in Japanese Unexamined Patent Publication No. 7-297186. This is because a fine processing of copper by a reactive ion etching (RIE) is difficult.
A silicon oxide film is used for the insulating material to be processed into an interlayer insulation film on which wiring grooves are formed in the conventional art described above. However, investigation has been recently carried out about the use of an organic insulating material, such as benzocyclobutene (BCB: Digest of Technological Papers, p88-89, Symposium on VLSI Technology, 1996).
In such a manner, investigation is carried out about the use of the organic insulation materials as interlayer insulation materials because they have a smaller relative dielectric constant of 2 to 3 as compared with the relative dielectric constant of about 4 in the silicon oxide film. In the relative dielectric constant, reduction allows the induced capacity between wiring layers to decrease so as to make it possible to largely improve electric transfer speed among the wiring layers in cooperation with the low resistivity of the copper wiring.
It becomes difficult, however, to form seed layers on the entire inner wall face of the wiring grooves in the conventional art as hitherto described when the wiring grooves have a fine width and large depth. This is because, since metal films such as a TiN film or tantalum film (Ta film) to be used for seed layers are deposited by a sputtering method, step coverage of the film becomes poor thereby being difficult to completely bury copper into the wiring grooves.
When seed layers are formed on the entire inner wall face of the wiring grooves, on the other hand, the film thickness of the seed layer at the opening of the wiring groove is so thickened that wiring resistance is increased even after burying copper into the wiring grooves because the electric resistance of the seed layer is larger than that of copper.
As hitherto described, it becomes difficult to fabricate wiring in grooves having a large ratio between the wiring height and width, or having a high aspect ratio.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a copper wiring structure of the semiconductor device as a finely fabricated wiring in grooves.
It is another object of the present invention to provide a semiconductor device provided with a copper wiring structure as described above.
It is still another object of the present invention to provide a method for fabricating the copper wiring structure of the foregoing semiconductor device.
In accordance with one aspect of the present invention, there is provided a semiconductor device provided with a copper wiring structure formed on a semiconductor substrate via an underlying insulation layer. In the semiconductor device of the present invention, the copper wiring structure is provided with a film for fabricating wiring provided with concave portions and formed on the underlying insulation film, a copper material buried into the concave portions and an electroconductive carbon layer lying between the copper material and the material for fabricating wiring.
In accordance with another aspect of the present invention, there is provided a copper wiring structure of a semiconductor device provided with a film for fabricating wiring provided with concave portions and formed on the underlying insulation film, a copper material buried into the concave portions and an electroconductive carbon layer lying between the copper material and a material for fabricating wiring.
It is preferable in the present invention that the copper material is provided with a multilayer structure, or that the film for fabricating wiring is provided with an organic interlayer film containing carbon as a main component.
It is more preferable in the present invention that the film for fabricating wiring is further provided with a protective insulation film formed on the organic interlayer film, or that the organic interlayer film is composed of an amorphous carbon layer supplemented with fluorine, or that the organic interlayer film is composed of a material having relative dielectric constant of 3 or less.
In accordance with a still another aspect of the present invention, there is provided a method for fabricating a copper wiring structure of the semiconductor device comprising a first step of forming a film for fabricating wiring including an organic interlayer film containing carbon as a main component on the semiconductor substrate, a second step of forming concave portions in the top face side of the film for fabricating wiring, a third step of forming an electroconductive carbon layer by a modification of the surface including the inner side of the concave portions of the organic interlayer film, and a fourth step of selectively depositing copper on the electroconductive carbon.
In the method of fabricating the copper wiring structure of a semiconductor device according to the present invention, it is more preferable that the organic interlayer film is an amorphous carbon film supplemented with fluorine deposited by a plasma CVD method using a reaction gas composed of tetrafluorocarbon and methane. In the method, the first step includes a sub-step of forming an inorganic insulation film on the organic interlayer film after forming the organic interlayer film or the third step includes a step for forming the electroconductive carbon layer by a modification of the exposed organic interlayer film using a plasma irradiation.
Modification as described above is applicable to wiring grooves or holes even when their dimensions are fine, since the layer is uniformly formed by controlling the thickness with a high precision. The electroconductive carbon layer thus formed can also serve as a growth seed layer.
It is more preferable in the method for fabricating the copper wiring structure of the semiconductor device according to the present invention that the inorganic insulation film comprises a silicon nitride film, that copper is deposited by a CVD method using an organic copper compound as a reaction gas in the fourth step, that the plasma irradiation is carried out in a reaction gas comprising plasma-activated hydrogen gas, and that the plasma irradiation is carried out in a reaction gas comprising a plasma activated alkyl gas.
A copper wiring is formed by depositing the copper material to bury and fill the wiring grooves by virtue of the seed layer formed on the side wal
Loke Steven
Vu Hung Kim
LandOfFree
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