Copper CMP flatness monitor using grazing incidence...

Optics: measuring and testing – By light interference – For dimensional measurement

Reexamination Certificate

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Reexamination Certificate

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06806966

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to the art of optical inspection of specimens, such as semiconductor wafers and hard disk surfaces, and more specifically to a system for determining surface topographies in the nanometer range using optical techniques.
2. Description of the Related Art
Optical inspection techniques for specimens, such as semiconductor wafers, have assessed the relative flatness of specimen surfaces using various techniques. Surface flatness is a critical parameter used to determine the overall quality of a semiconductor wafer, and wafers having large irregular areas or small areas with radical height differences are undesirable.
For CMP (Chemical Mechanical Planarization) processed wafers, the starting material is a bare silicon wafer. Such a bare silicon wafer must be flat within certain tolerances regarding the height and spatial width of the flatness features.
Current tools available to measure wafer surface flatness include the “Magic Mirror” tool by Hologenix. The “Magic Mirror” operates by directing collimated light toward the wafer surface, wherein the collimated light source is angularly displaced from the wafer surface. The “Magic Mirror” system subsequently receives the reflected light, and the light received may be scattered toward or away from the detector. The “Magic Mirror” thereupon produces a two dimensional depiction of the surface of the observed semiconductor wafer, with associated light and/or dark areas depending on the type of defect. As can be appreciated, the “Magic Mirror” is a very subjective method of detecting surface contours. With different types of defects producing different optical effects, one cannot say for certain what type or size of defect is responsible for the bright or dark spot or area in the “Magic Mirror” depiction. Hence algorithms cannot conclusively provide areas of concern or threshold exceedance with reasonable degrees of certainty. The final two dimensional representation obtained from the “Magic Mirror” must be studied by an operator, and results depend on many uncontrollable factors.
Tools like the Magic Mirror can be used for flatness inspection of a bare wafer. However, for CMP processed wafer monitoring additional issues arise relating to the efficiency of the polishing, such as pitting and dishing of the patterned wafer surface. Magic mirror type tools are ineffective in addressing these types of anomalies.
A system addressing specimen flatness issues is the subject of current U.S. patent application Ser. No. 09/195,533, filed on Nov. 18, 1998, entitled “Detection System for Nanometer Scale Topographic Measurements of Reflective Surfaces” and developed by and assigned to KLA-Tencor Corporation, the assignee of the present application, provides a linear position array detector system which imparts light energy in a substantially normal orientation to a surface of a specimen, such as a semiconductor wafer, receives light energy from the specimen surface and monitors deviation of the retro beam from that expected. This system has particular advantages but requires a post processor to determine and fully compute the surface geometry for the entire specimen.
One device commonly used to measure the quality of the polishing of a CMP processed wafer is a profiler, much like a stylus on a record player, which directly contacts the semiconductor wafer surface. Such a system moves the semiconductor wafer and sensor relative to each other causing the sensor to linearly translate across the surface, thereby providing contact between the profiler and the entire surface. Movement of the profiler is recorded, and surface irregularities are detected when the profiler deflects beyond a threshold distance. The problems inherent in a profiler are at least twofold: first, a mechanical profiler contacting the wafer surface may itself produce surface irregularities beyond those present prior to the testing, and second, the time required to make accurate assessments of surface irregularities is extensive. For example, a full map of a single 200 mm wafer using a profiler may take between four and twelve hours.
A system is needed which diminishes the time required to perform surface scanning for contour differences and does not have the drawbacks inherent in the Magic mirror or profiler configurations. Further, it would be advantageous to provide a system which is less expensive than the KLA-Tencor normal incidence system and which can be used in examining less than the entire specimen surface quickly and efficiently. In particular, it would be desirable to have a system for determining specimen surface variations that would not risk damage to the specimen and would be quantitative in nature, thereby permitting contour quantification without ad hoc human review.
A further disadvantage of currently available flatness or contour measurement devices is that they stand separate from the production process and cannot be integrated into the process line. A developer or processing facility must first use the profiler or other device off line to inspect the surface of the specimen and subsequently place the specimen in the processing line for further inspection and processing.
It is therefore an object of the current invention to provide a system for determining the contours of portions of the surface of a specimen, such as a semiconductor wafer that can perform surface irregularity determination in less time and more cost effectively than systems previously known.
It is a further object of the current invention to provide a system for determining the contours of a wafer surface which does not increase the risk of damaging the wafer surface.
It is another object of the current invention to provide a system for inspecting the flatness or contour of a specimen that may be employed and integrated in the process line.
SUMMARY OF THE INVENTION
The present invention is a system and method for performing an in line inspection of a wafer or specimen using optical techniques. The wafer may be mounted in a vertical or horizontal orientation. Light energy is transmitted through a lens arrangement employing lenses having diameter smaller than the specimen, such as less than half the size of the specimen, arranged to cause light energy to strike the surface of the wafer and subsequently pass through a second collimating lens where detection and observation is performed.
The inventive system includes a low coherence light source that transmits light energy through a collimator, which collimates the light energy and directs the light energy to a diffraction grating. The diffraction grating splits the received beam into two separate first order beams. One first order beam is directed to the wafer surface, while the other beam is directed toward a flat reflective surface facing the wafer surface. Another diffraction grating is positioned to receive the two reflected first order beams and combine said beams toward a camera. The camera is specially designed to receive the signal provided and resolve the image of the wafer surface.
While the positive and negative first orders are preferably employed in the system as the test and reference arms, the gratings may be tilted to employ a different combination of orders as test and reference arms. Introduction of such a tilt may provide different combinations of orders used as test and reference arms, including zero order and higher order components. Further, the system may be arranged such that the angles of incidence on the surface vary, either by tilting the gratings or otherwise repositioning the components. Such variance may cause different orders of the components to strike the target surface and/or reference surface. Varying the incidence in this manner may in certain environments improve system resolution.
The light energy transmitted from the low coherence light source is dimensioned in conjunction with the collimator and diffraction grating to provide a narrow swath of light energy over a predetermined area of the wafer having a known pattern

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