Semiconductor device manufacturing: process – With measuring or testing
Reissue Patent
1998-11-19
2002-07-09
Powell, William A. (Department: 1765)
Semiconductor device manufacturing: process
With measuring or testing
C216S038000, C252S079400, C438S633000, C438S692000, C438S693000, C438S672000
Reissue Patent
active
RE037786
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a copper-based metal polishing solution and a method for manufacturing a semiconductor device.
2. Description of the Related Art
A polishing solution for a Cu film or a Cu-alloy film, which consists of a slurry of amine-based colloidal silica or a slurry added with K
3
Fe(CN)
6
, K
4
(CN)
6
, or Co(NO
3
)
2
, is disclosed in J. Electrochem. Soc., Vol. 138, No. 11, 3460 (1991), VMIC Conference, ISMIC-101/92/0156 (1992) or VMIC Conference, ISMIC-102/93/0205 (1993).
Unfortunately, the above polishing solution has the following problem since there is no difference between the Cu film dissolution velocity of the polishing solution during dipping and that during polishing.
In the formation of an interconnecting layer as one manufacturing step of semiconductor devices, an etch-back technique is employed in order to remove steps from the device surface. This etch-back technique is a method in which a trench is formed in an insulating film on a semiconductor substrate, and a Cu film is deposited on the insulating film including the trench and polished by using a polishing solution, thereby forming a buried interconnecting layer by leaving the Cu film behind only in the trench. After this etch-back step, the Cu interconnecting layer remaining in the trench is brought into contact with a polishing solution. Therefore, if a polishing solution of the composition discussed above by which no difference is obtained between the Cu film etching rate during dipping and that during polishing, the Cu interconnecting layer is further etched by the polishing solution. As a result, the surface of the Cu interconnecting layer becomes lower than the surface of the insulating film. This makes it difficult to form an interconnecting layer whose surface is level with the surface of the insulating film, resulting in a low flatness. In addition, the resistance of a buried Cu interconnecting layer formed in this manner becomes higher than that of a Cu interconnecting layer which is so buried that its surface is level with the surface of an insulating film.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a copper-based metal polishing solution which hardly etches copper (Cu) or a copper alloy (Cu alloy) when this Cu or Cu alloy is dipped into the solution, and dissolves the Cu or Cu alloy during polishing with an etching rate several times to several ten times higher than that during the dipping.
It is another object of the present invention to provide a method for manufacturing a semiconductor device, in which a trench and/or an opening is formed in an insulating film on a semiconductor substrate, and an interconnection material film deposited on the insulating film and consisting of copper (Cu) or a copper alloy (Cu alloy) can be etched back within a short time period and at the same time a buried interconnecting layer whose surface is level with the surface of the insulating film can be formed.
It is still another object of the present invention to provide a method for manufacturing a semiconductor device, in which a trench and/or an opening is formed in an insulating film on a semiconductor substrate, an interconnection material film deposited on the insulating film and consisting of Cu or a Cu alloy can be etched back within a short time period to form a buried interconnecting layer whose surface is level with the surface of the insulating film, and the surface of the insulating film and the like after the etch back can be cleaned well.
According to the present invention there is provided a copper-based metal polishing solution containing at least one
organic
acid selected from
the group consisting of
aminoacetic acid
and amidosulfuric
or aminosulfuric
acid, an oxidizer, and water.
According to the present invention, there is also provided a method for manufacturing a semiconductor device, comprising the steps of:
forming at least one member selected from the group consisting of a trench and an opening corresponding to a shape of an interconnecting layer in an insulating film on a semiconductor substrate;
depositing an interconnection material film consisting of copper (Cu) or a copper alloy (Cu alloy) on the insulating film including at least one member selected from the group consisting of a trench and an opening; and
polishing the interconnection material film until a surface of the insulating film is exposed by using a polishing solution containing at least one
organic
acid selected from the group consisting of aminoacetic acid and
amidosulfuric
aminosulfuric
acid, an oxidizer, and water, thereby forming a buried interconnecting layer in the insulating film such that surfaces of the interconnecting layer and the insulating film are level with each other.
Furthermore, according to the present invention, there is provided a method for manufacturing a semiconductor device, comprising the steps of:
forming at least one member selected from the group consisting of a trench and an opening corresponding to a shape of an interconnecting layer in an insulating film on a semiconductor substrate;
depositing an interconnection material film consisting of copper (Cu) or a copper alloy (Cu alloy) on the insulating film including at least one member selected from the group consisting of a trench and an opening;
polishing the interconnection material film until a surface of the insulating film is exposed by using a polishing solution containing at least one organic acid
selected from the group consisting of aminoacetic acid and amidosulfuric acid,
an oxidizer, and water, thereby forming a buried interconnecting layer in the insulating film such that surfaces of the interconnecting layer and the insulating film are level with each other; and
treating the surface of the insulating film including the interconnecting layer with an aqueous dissolved ozone solution and then with an aqueous dilute hydrofluoric acid solution.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out in the appended claims.
REFERENCES:
patent: 4086176 (1978-04-01), Ericson et al.
patent: 4954142 (1990-09-01), Carr et al.
patent: 4956313 (1990-09-01), Cote et al.
patent: 5225034 (1993-07-01), Yu et al.
patent: 47-3409 (1972-02-01), None
patent: 48-17439 (1973-03-01), None
patent: 61-591 (1986-01-01), None
Higuchi Masatoshi
Hirabayashi Hideaki
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
Powell William A.
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