Computer graphics processing and selective visual display system – Display peripheral interface input device – Cursor mark position control device
Reexamination Certificate
2001-06-26
2004-02-24
Chow, Dennis-Doon (Department: 2675)
Computer graphics processing and selective visual display system
Display peripheral interface input device
Cursor mark position control device
C345S173000, C345S174000
Reexamination Certificate
active
06697046
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention concerns a coordinate input device and, more in particular, it relates to a structure of a transfer portion with improved reliability of a coordinate input device when used, particularly, under a circumstance in a wide temperature range.
2. Description of the Related Art
In a case where the surface of a flat plate is designated by a coordinate pointer such as a pen or a finger, or a trace is drawn by moving the designated point, a coordinate input device in which a cursor indicates a corresponding coordinate position on a computer display or a cursor is moved to draw a trace is referred to as a tablet and has been used generally.
FIG. 4
shows a first example of an existent structure of a coordinate input device.
FIG. 4
is a plan view illustrating a coordinate input device of a first example in an exploded state.
FIG. 4A
is a plan view of an upper electrode plate
102
of the coordinate input device of the first example and
FIG. 4B
is a plan view of a lower electrode plate
103
of the coordinate input device of the first example.
The coordinate input device of the first example shown in
FIG. 4
comprises an upper electrode plate
102
, a lower electrode plate
103
, a flexible printed circuit board (hereinafter simply referred to as FPC)
104
as a connection terminal with a control driving section (not illustrated)
The upper electrode plate
102
shown in
FIG. 4A
comprises, on a film substrate
100
, an ITO (indium tin oxide) resistor layer
105
a,
a pair of parallel elongated rectangular electrodes
106
a
and
106
b,
transfer portions
109
a
and
109
b
formed near both ends of the electrodes
106
a
and
106
b
and an insulation resist
108
a
laminated successively.
Further, the lower electrode
103
shown in
FIG. 4B
comprises, on a glass substrate
101
, an ITO resister layer
105
b,
an insulation spacer (not illustrated), a pair of elongated rectangular electrodes
106
c
and
106
d
parallel with each other, wiring patterns
107
a
-
107
d,
the transfer portions
109
c
and
109
d
described above and an insulation resist
108
b
laminated in this order, to which the FPC
104
is connected.
The electrodes
106
a
and
106
b
shown in
FIG. 4A
are formed along opposing shorter sides of the film substrate
100
respectively, and the insulation resists
108
a
and
108
b
are formed along the shorter sides of the substrate
100
so as to cover the electrodes
106
a
and
106
b.
Further, the insulation resists
108
a
and
108
b
are provided with uncovered portions near both ends of the electrodes
106
a
and
106
b
and the portions constitute transfer portions
109
a
and
109
b.
The electrodes
106
c
and
106
d
shown in
FIG. 4B
are formed along opposed longer sides of the glass substrate
101
respectively.
Further, electrodes
106
e
and
106
f
are formed along the shorter sides of the glass substrate
101
on the previously formed insulation resist and they are placed at positions corresponding to the electrodes
106
a
and
106
b
of the upper electrode
102
.
The lower electrode plate
103
shown in
FIG. 4B
is formed with an insulation resist
108
c
along four sides thereof, the insulation resist does not cover the portions corresponding to the transfer portions
109
a
and
109
b
disposed near both ends of the electrodes
106
a
and
106
b
of the upper electrode
102
and the uncovered portions constitute transfer portion
109
c
and
109
d.
In
FIG. 4B
, wiring patterns
107
c
,
107
d
,
107
a
and
107
b
are connected to the right of the electrode
106
c
, at the right end of the electrode
106
d
, and the upper ends of the electrodes
106
e
and
106
d
, respectively, and the other ends of the wiring patterns
107
a
to
107
d
are connected with the FPC
104
.
The insulation resist
108
c
is formed along four sides of the lower electrode plate
103
so as to cover the electrodes
106
c
to
106
f
and the wiring patterns
107
a
to
107
d.
When the coordinate input devices is assembled, the upper electrode plate
102
and the lower electrode plate
103
are joined at the position of opposing the ITO resistor layers
105
a
and
105
b
, arranging, the electrodes
106
a
and the
106
c
at a right angle, and abutting the transfer portion
109
a
of the upper electrode plate
102
with the transfer portion
109
c
of the lower electrode plate
103
and the transfer portion
109
b
of the upper electrode plate
102
with the lower electrode plate
109
d.
Then, the abutted transfer portions are integrated by heating and solidification.
The circuit from the electrodes
106
a
to
106
d
to the FPC
104
shown in
FIG. 4
has such a structure that the electrodes
106
a
and
106
b
are connected by way of the transfer portions
109
a
and
109
b
to the electrodes
106
e
and
106
f
provided with the transfer portions
109
c
and
109
d
of the lower electrode plate
103
and connected by way of the wiring patterns
107
a
and
107
b
of the lower electrode plate
103
to the FPC
104
in the upper electrode plate
102
, while the electrodes
106
c
and
106
d
are connected by way of the wiring patterns
107
c
and
107
d
to the FPC
104
in the lower electrode plate
103
.
The coordinate input device described above has been incorporated in mobile equipment and the working conditions have become increasingly severe.
It is necessary that the mobile equipment operate stably over a wide range of temperatures, for example, from −30° C. to 70° C. and, naturally, it is also necessary for the coordinate input device mounted thereon to secure stable operation in the temperature range described above.
However, in the structure of the existent coordinate input device of the first example described above, since a film substrate is used for the upper electrode plate
102
and the glass substrate is used for the lower electrode plate
103
in order to adopt an advantageous structure in view of the operationability and the durability, a problem exists. In temperatures that are greatly different from the temperature upon bonding both of the electrode plates, stress generated by the difference of the thermal expansion coefficient between the film substrate and the glass substrate and by expansion and shrinkage of an air layer in a space between both of the electrodes is exerted on the transfer portions
109
a
to
109
d
connecting the circuits of the upper electrode plate
102
and the lower electrode plate
103
to defoliate the transfer portions and result in disconnection of the connection circuit to the driving control section.
Then, as one of means for solving the problems, it has been known a method of constituting the film substrate used for the upper electrode plate as a two-layer structure formed by appending to film substrates of different thickness.
FIG. 5
shows a partial cross sectional structure of an upper electrode plate
202
using a film substrate of a two-layered structure as a second example of the existent coordinate input device. The upper electrode plate
202
of the second example shown in
FIG. 5
has an identical constitution with that of the upper electrode
102
of the first existent example shown in
FIG. 4A
except for using a film substrate
220
of the two-layered structure.
The upper electrode plate
202
shown in
FIG. 5
as a fragmentary cross sectional structure uses a film substrate
221
made of polyethylene terephthalate (hereinafter simply referred to as PET) of 125 &mgr;m thickness and a film substrate
222
made of PET of 25 &mgr;m thickness bonded and secured to each other by an adhesive
223
of about 25 &mgr;m thickness as a film substrate
220
, in which an ITO resistor layer
205
, an electrode
206
, and an insulation resist
208
are formed successively on the side of the film substrate
222
of 25 &mgr;m thickness.
The thickness of the film substrate
220
in the upper electrode plate
202
of the second existent example is 175 &mgr;m and the thickness of the film substrate
100
used for the upper electrode plate
102
Sasagawa Hideto
Watanabe Takeshi
Alps Electric Co. ,Ltd.
Anyaso Uchendu O.
Brinks Hofer Gilson & Lione
Chow Dennis-Doon
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