Convolution memory

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Details

3649278, 3649235, 3649393, 364754, G06F 752

Patent

active

050142356

ABSTRACT:
Method and apparatus including a system of integrated ciruit devices for executing matrix operations of the form [A] operated upon by [B] equals [C], where [A], [B] and [C] are each a matrix having a plurality of elements expressed in either unsigned or in two's complement format. The system includes at least one first array of data storage means organized as (j) physical rows and (k) physical columns of bits for providing storage for one bit of each of a plurality of elements of a row vectors of the matrix [A], an individual one of the (j) rows having bits of the same binary weight. The system further includes at least one second array of data storage means organized as (m) physical rows and (n) physical columns of bits, an individual one of the (m) rows storing a same binary weight bit or each of a plurality of elements of a column vector of the matrix [B]. The system further includes a processing device for processing in a predetermined manner a specified one of the (j) rows of the first array of data storage means with a specified one of the (m) rows of the second array of data storage means for producing a plurality of (x) output bits. The system also includes logic for determining a number of the output bits having a specified logic state and logic for determining a dot product.

REFERENCES:
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patent: 4150434 (1979-04-01), Shibayama et al.
patent: 4347580 (1982-08-01), Bond
patent: 4489393 (1984-12-01), Kawahara et al.
patent: 4493048 (1985-01-01), Kung et al.
patent: 4593373 (1986-06-01), Kiuchi et al.
patent: 4750144 (1988-06-01), Wilcox
patent: 4754412 (1988-06-01), Deering
patent: 4777614 (1988-10-01), Ward

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