Convolution arithmetic circuit for digital signal processing

Details Convolution arithmetic circuit for digital signal processing Convolution arithmetic circuit for digital signal processing

1985-03-28

1988-02-23

Harkcom, Gary V.

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G06F 738

Patent

active

047275057

ABSTRACT:
A convolution arithmetic circuit has a multiplier/accumulator to multiply two digital data sequences and add up the products. The sequences are stored in memories which cycle at the same rates and with different scales. One memory containing the multiplicand data is periodically updated, while the other memory containing coefficient data has a storage capacity of about twice the previous memory.

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patent: 4063082 (1977-12-01), Nussbaumer
patent: 4490805 (1984-12-01), Tamura
patent: 4573136 (1986-02-01), Rossiter
Musen to Jikken, "FIR Filter and Digital Signal Processing"Special Edition, Nov. 20, 1979, pp. 89-96.
Finn, "LSI Hardware Implements Signal Processing Algorithms"Computer Design, Mar. 1980, pp. 137-139.

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