Converting a pulse-width modulation signal to an analog voltage

Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion

Reexamination Certificate

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Reexamination Certificate

active

06208280

ABSTRACT:

FIELD OF THE INVENTION
This invention relates generally to the field of electrical control and signal processing devices, and more particularly, but not by way of limitation, to a method and apparatus for converting a pulse-width modulation (PWM) signal to an analog voltage, the analog voltage having a magnitude indicative of a duty cycle of the PWM signal.
BACKGROUND OF THE INVENTION
Pulse-width modulation (PWM) signals are commonly used in a variety of electrical applications, such as signal processing channels and motor speed control circuitry. A PWM signal alternatively transitions between two voltage levels (“high” and “low” levels) over each of a series of successive cycles, with the cycles occurring at a selected frequency. The percentage of time that the signal is at the high level as compared to the duration of the entire cycle is commonly referred to as the duty cycle. Thus, a PWM signal with a 50% duty cycle resembles a typical square-wave signal with high and low levels of equal length.
One particularly useful application of PWM signals is in the area of motor driver circuitry for hard disc drive data storage devices (“disc drives”). A typical disc drive includes one or more rigid discs which are mechanically coupled for rotation about a spindle motor at a selected operational speed (such as 10,000 revolutions per minute). Data are magnetically stored and retrieved from tracks defined on the disc surfaces by an array of read/write heads which are controllably positionable using an actuator motor, such as a voice coil motor (VCM).
For each type of motor, it is common to generate a multi-bit digital control value indicative of the desired speed of the motor. The disc drive converts the digital control value to a PWM signal with a duty cycle indicative of the magnitude of the digital control value. In turn, the PWM signal is converted to an analog control voltage with a magnitude indicative of the PWM duty cycle, with the analog control voltage used to control the application of current to the motor. It will be recognized that in the case of the spindle motor, the analog control voltage will tend to made necessary adjustments in the rotational speed of the spindle motor to maintain this speed within a desired range, whereas in the case of the VCM, the analog control voltage controls the acceleration and deceleration of the heads as the heads are moved to positions adjacent various tracks on the discs.
Prior art circuits used to convert a PWM signal to a corresponding analog voltage have taken a variety of forms, including use of filtering to achieve the necessary conversion. While operative, limitations with such prior art methodologies include insufficient bandwidth and resolution, as well as difficulties in efficiently implementing the entire circuit into an application specific integrated circuit (ASIC). Accordingly, there is a need for an improved approach to converting a PWM signal to a corresponding analog voltage, and it is such improvements that the present invention is directed.
SUMMARY OF THE INVENTION
The present invention provides an apparatus and method for converting a pulse-width modulation (PWM) signal to a corresponding analog voltage having a magnitude indicative of the duty cycle of the PWM signal.
As exemplified by preferred embodiments, a current source supplies electrical charge at a controllable rate to a ramp capacitor which, during successively occurring cycles of the PWM signal, alternatively receives electrical charge from the current source and discharges previously received electrical charge.
A first sampling capacitor receives electrical charge from the ramp capacitor to output a feedback voltage to a feedback circuit to adjust the rate of electrical charge supplied by the current source, with the charge transferred to the first sampling capacitor determined in relation to the charge stored on the ramp capacitor over an entire PWM cycle.
A second sampling capacitor receives electrical charge from the ramp capacitor to output the analog voltage, with the charge transferred to the second sampling capacitor determined in relation to the duty cycle of the PWM signal.
These and various other features as well as advantages which characterize the present invention will be apparent from a reading of the following detailed description and a review of the associated drawings.


REFERENCES:
patent: 4780656 (1988-10-01), Mitchell
patent: 4929947 (1990-05-01), Toyama
patent: 5008675 (1991-04-01), Toyomaki
patent: 5023615 (1991-06-01), Yamada et al.
patent: 5148168 (1992-09-01), Masuda et al.
patent: 5613149 (1997-03-01), Afek et al.

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