Converter, circuit and method for compensation of...

Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder

Reexamination Certificate

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C341S118000, C341S120000

Reexamination Certificate

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10534119

ABSTRACT:
A continuous time sigma delta converter has a filter and converter components having known non-ideal characteristics. A compensation circuit has error modelling components arranged to model the non-ideal characteristics of the converter. A summation block combines a compensation signal from the compensation circuit with a non-ideal output signal from the converter in order to provide a compensated output signal. This has substantially no effect on other modulator performance characteristics and contributes to the implementation of giga sample-per-second Continuous Time sigma deltas having the dynamic range capabilities of traditional DT sigma deltas.

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patent: 6016112 (2000-01-01), Knudsen
patent: 6271782 (2001-08-01), Steensgaard-Madsen
patent: 6275177 (2001-08-01), Ho et al.
patent: 6407685 (2002-06-01), Handel et al.
patent: 6653958 (2003-11-01), Morche
patent: 6812876 (2004-11-01), Miller
patent: 2001/0038350 (2001-11-01), Paillardet
patent: 2002/0175846 (2002-11-01), Sakimura

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