Conversion circuit for burst signals referencing to various...

Details Conversion circuit for burst signals referencing to various... Conversion circuit for burst signals referencing to various...

2003-07-14

2004-06-22

JeanPierre, Peguy (Department: 2819)

Coded data generation or conversion

Digital code to digital code converters

C710S035000

Reexamination Certificate

active

06753796

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a conversion circuit for burst signals and method for the same, especially to a conversion circuit for burst signals referencing to various clocks and method for the same.
BACKGROUND OF THE INVENTION
Due to the fast development of computer technologies and the processing requirement of sophisticated software, the internal frequency of central processing unit (CPU) is rapidly increased. Correspondingly, the modern computer is tiered to several hierarchies in terms of clock rate in order to exploit optimal efficiency for each component thereof. Therefore, a motherboard preferably provides several kinds of clock signals to meet the requirement of different operation frequencies in those hierarchies. For example, if the external frequency (motherboard speed) of a CPU is 133 MHz, the internal frequency of the CPU may be 1.6 GHz, the frequency of the front-side bus (processor bus) may be 533 MHz, and the frequency of the memory bus and the IDE bus may be slower 100 MHz. Therefore, it is a challenging issue to provide a robust and efficient interface for signal conversion and transmission among those device with different clock rates.
The above problem is even worse in a computer adopting burst mode for data transmission, which is developed to enhance data transmission efficiency among the components of a computer. Due to the consecutive nature of burst signals, the sampling is difficult for signal transmitted from component with different clock rates. More particularly, the problem of signal lost or duplication is probable to occur due to the difficulty of counting the number of independent signals in a burst signal.
FIG. 1
shows a block diagram of a conventional conversion circuit adapted for systems with different clock rates, i.e. a first system
120
with a first clock CLK
1
and a second system
140
with a second clock CLK
2
. The conversion circuit comprises a signal receiver
123
and a first counter
125
in the first system
120
, and a signal generator
143
and a second counter
145
in the second system
140
.
When a burst signal SIG
1
referencing to the first clock CLK
1
is to be sent from the first system
120
to the second system
140
, the burst signal SIG
1
is firstly sent to the signal receiver
123
from the first system
120
. The first counter
125
counts the number of the independent signals (how many clock cycles) in the burst signal SIG
1
with reference to the first clock CLK
1
and sends the counting result CNT
1
of the burst signal SIG
1
to the second counter
145
. The second counter
145
counts the counting result CNT
1
with reference to the second clock CLK
2
and has increased count only when the second counter
145
senses the increment of the counting result CNT
1
at the rising edge of the second clock CLK
2
.
The signal generator
143
is triggered by an increment in the counting result CNT
2
of the second counter
145
to generate a signal SIG
2
referencing to the second clock CLK
2
for the second system
140
.
However, the conventional conversion circuit requires the provision of the signal receiver, the signal generator, and the counters for those systems, the cost is high. Moreover, the signal generator may have wrong sampling over the signal receiver due to clock rate difference in both systems.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a method for converting burst signals referencing to various clocks, wherein a burst signal is decomposed into a plurality of non-burst signals, the non-burst signals are converted to signals referencing to another clock rate and then the signals are combined to form desired output signal.
It is another object of the present invention to provide a conversion circuit for signals referencing to various clocks, which comprises a plurality of phase signal generators and a plurality of signal fetching units to fast decompose a burst signal to a plurality of non-burst signals.
It is still another object of the present invention to provide a conversion circuit for signals referencing to various clocks, which uses phase signal consisting of cyclic high-level signal and low-level signal and AND gate to decompose the burst signal.
It is still another object of the present invention to provide a conversion circuit for signals referencing to various clocks, which uses an OR gate to combine a plurality of converted non-burst signals into desired output signal.
The various objects and advantages of the present invention will be more readily understood from the following detailed description when read in conjunction with the appended drawing, in which:


REFERENCES:
patent: 4476558 (1984-10-01), Arnon
patent: 4797730 (1989-01-01), Smith
patent: 5406335 (1995-04-01), Nikoh
patent: 6151356 (2000-11-01), Spagnoletti et al.
patent: 6330391 (2001-12-01), Kurihara et al.

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