Controlling electrical power

Details Controlling electrical power Controlling electrical power

1987-12-14

1988-12-27

Wong, Peter S.

Electric power conversion systems

Current conversion

With condition responsive means to control the output...

323243, 323300, 323902, H02P 1326

Patent

active

047945079

ABSTRACT:
A power controller includes a full-wave bridge rectifier circuit coupled to an A.C. line by a storage inductor with two windings and a saturating inductor. The output of the bridge rectifier is connected to a D.C. output terminal for producing output voltages for a symmetrical amplifier. The D.C. potential provided by the full-wave rectifier is compared with a ramp signal having an external ramp set point related to the D.C. output potential relative to a reference potential to provide a trigger pulse for controlling the time the SCR is gated on. A balancing system selectively switches auxiliary resistances in and out to maintain a desired balance. Upon sensing a gross imbalance, the SCR is turned off. The power controlling apparatus includes isolation circuitry for creating an isolation barrier having a high frequency path and a low frequency path. The high frequency path includes a transformer having main primary and secondary windings. The transformer also includes an auxiliary primary winding whose output is combined with the signal on the input terminal to provide low frequency spectral components of the input signal that are coupled across the barrier by an electro-optical coupler that energize a low pass filter. The output of the low pass filter is combined with the signal on the secondary of the transformer to provide the isolated output signal. The power amplifier also includes bias control circuitry including a differential amplifier having two transistors with emitters connected together and bases direct coupled to respective emitters of the output Darlington transistors. The respective collectors are direct coupled to respective bases of the output Darlington transistors. A capacitor is connected between the bases of the two transistors.

REFERENCES:
patent: 3353082 (1967-11-01), Mellott et al.
patent: 3868562 (1975-02-01), Marshall
patent: 4376969 (1983-03-01), Bedard et al.
patent: 4384259 (1983-05-01), Capewell
patent: 4541040 (1985-09-01), Allfather
patent: 4686619 (1987-08-01), Edwards

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