Controller for two-way set associative cache

Details Controller for two-way set associative cache Controller for two-way set associative cache

1990-11-28

1993-05-11

Bowler, Alyssa H.

Static information storage and retrieval

Magnetic bubbles

Guide structure

365 49, 364DIG1, 364243, G06F 1200, G06F 1314, G11C 1504

Patent

active

052108457

ABSTRACT:
A cache controller (10) which sits in parallel with a microprocessor bus (14, 15, 29) so as not to impede system response in the event of a cache miss. The cache controller tagram (24) is configured into a two ways, each way including tag and valid-bit storage for associatively searching the directory for cache data-array addresses. The external cache memory (8) is organized such that both ways are simultaneously available to a number of available memory modules in the system to thereby allow the way access time to occur in parallel with the tag lookup.

REFERENCES:
patent: 4580240 (1986-04-01), Watanabe
patent: 4758982 (1988-07-01), Price
patent: 4833642 (1989-05-01), Ooi
patent: 4945512 (1990-07-01), DeKarske et al.

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