Controller for linking a typewriter console to a processor unit

Details Controller for linking a typewriter console to a processor unit Controller for linking a typewriter console to a processor unit

1975-02-03

1976-04-20

Ruggiero, Joseph F.

Communications: electrical

Digital comparator systems

G06F 310

Patent

active

039522890

ABSTRACT:
A controller implemented on a single LSI MOS chip is described for linking a typewriter console to a processor unit. The controller comprises a FIFO (First-In-First-Out) buffer for storing the keyboard data characters read-out from the console. The buffer includes a flag for each stage, each flag being controlled to assume a first condition when its respective stage is occupied by a character, and a second condition when it is vacant of a character. The keyboard data characters are inputted into the first stage by strobe pulses, and are continuously shifted by high-speed clock pulses to the highest stage of the buffer whose flag is in the stage-vacant condition, the characters being read-out from the last stage. The buffer includes means for preventing the entry of a new character, and also for providing an indication of an "Overflow" condition, whenever a strobe pulse is received by the buffer while the first-stage flag of the buffer is in the stage-occupied condition.
The described controller also includes a plurality of registers for storing indicator data to be used for driving keyboard indicators, and an arrangement for multiplexing the indicator registers according to one of three pre-selected modes, depending on the number of indicators to be driven. Further included in the described controller is an arrangement for reading-out the keyboard switches to the processor unit.

REFERENCES:
patent: 3440613 (1969-04-01), Vercellotti et al.
patent: 3815104 (1974-06-01), Goldman
patent: 3848232 (1974-11-01), Leibler et al.
patent: 3872444 (1975-03-01), Cleveland et al.

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