Controller for DC-DC converter

Details Controller for DC-DC converter Controller for DC-DC converter

1999-10-07

2001-02-27

Wong, Peter S. (Department: 2838)

Electricity: battery or capacitor charging or discharging

Battery or cell charging

With detection of current or voltage amplitude

C320S162000, C320S163000, C320S141000, C323S282000

Reexamination Certificate

active

06194875

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a method and a circuit for controlling a DC—DC converter, and more particularly, to a method and a circuit for controlling a DC—DC converter that generates the operational power for portable electronic equipment and the charging power of a battery used in such electronic equipment.
Portable electronic equipment, such as notebook computers, include a DC—DC converter which generates system power and battery charging power from a DC power supply provided by an external AC adapter. The DC—DC converter is set such that the sum of the system consumption current and the battery charging current is smaller than the current supply capacity of the AC adapter. This is because an overcurrent limiter of the AC adapter inhibits the current output when the value of the current sum becomes greater than the AC adapter's current supply capacity. Thus, it is advantageous if the DC—DC converter can make full use of the entire current supply capacity.
FIG. 1
is a schematic diagram showing a first prior art example of a DC—DC converter
100
. The DC—DC converter
100
includes a control circuit
2
and a plurality of external elements. The control circuit
2
and the external elements are formed in the same semiconductor integrated circuit. The control circuit
2
outputs a signal SG
1
to the gate of an output transistor
3
, which is preferably an enhancement type PMOS transistor. An AC adapter
4
provides a DC power supply voltage Vin to the source of the output transistor
3
via a resistor R
1
. The DC power supply voltage Vin is also provided to an output terminal EX
1
via the resistor R
1
and a diode D
1
. The output voltage Vout
1
is provided to an electronic device from the output terminal EX
1
. The drain of the output transistor
3
is connected to a charging output terminal EX
2
via an output coil
5
and a resistor R
2
. The charging output terminal EX
2
is connected to the output terminal EX
1
via a diode D
2
. The output voltage Vout
2
is provided to a battery BT from the charging output terminal EX
2
.
The drain of the output transistor
3
is also connected to the cathode of a flywheel diode
6
, which may be a Schottky diode. The anode of the flywheel diode
6
is connected to a ground GND. The node between the output coil
5
and the resistor R
2
is connected to the ground GND via a smoothing capacitor
7
. The smoothing capacitor
7
and the output coil
5
form a smoothing circuit which smoothes the output voltage Vout
2
.
The control circuit
2
includes a first current detection amplifying circuit
11
, a second current detection amplifying circuit
12
, first, second, and third error amplifying circuits
13
,
14
,
15
, a PWM comparison circuit
16
, a triangular wave oscillating circuit
17
, and an output circuit
18
.
The first current detection amplifying circuit
11
has an inverting input terminal connected to the low potential terminal of the resistor R
1
and a non-inverting input terminal connected to the high potential terminal of the resistor R
1
. The amplifying circuit
11
detects the value of the current I
0
supplied by the AC adapter
4
and provides the first error amplifying circuit
13
with a first voltage signal SG
2
corresponding to the current value. An increase in the supply current I
0
increases the potential of the first voltage signal SG
2
. A decrease in the supply current I
0
decreases the potential of the first voltage signal SG
2
. The supply current I
0
is equal to the sum of the output current I
1
of the output terminal EX
1
and the charging current I
2
(flowing through the resistor R
2
) provided to the battery BT by the charging output terminal EX
2
.
The first error amplifying circuit
13
has an inverting input terminal, which is provided with the first voltage signal SG
2
, and a non-inverting input terminal, which is provided with a first reference voltage Vref
1
. The first error amplifying circuit
13
compares the first voltage signal SG
2
with the first reference voltage Vref
1
and amplifies the voltage difference to generate a first error output signal SG
3
, which is provided to the PWM comparison circuit
16
. An increase in the potential of the first voltage signal SG
2
decreases the potential of the first error output signal SG
3
, and a decrease in the potential of the first voltage signal SG
2
increases the potential of the first error output signal SG
3
.
The second current detection amplifying circuit
12
has an inverting input terminal connected to the low potential terminal of the resistor R
2
and a non-inverting input terminal connected to the high potential terminal of the resistor R
2
. The amplifying circuit
12
detects the value of the charging current I
2
supplied to the battery BT and provides the second error amplifying circuit
14
with a second voltage signal SG
4
corresponding to the detected value. An increase in the charging current I
2
increases the potential of the second voltage signal SG
4
. A decrease in the charging current I
2
decreases the potential of the second voltage signal SG
4
.
The second error amplifying circuit
14
has an inverting input terminal, which is provided with the second voltage signal SG
4
, and a non-inverting input terminal, which is provided with a second reference voltage Vref
2
. The second error amplifying circuit
14
compares the second voltage signal SG
4
with the second reference voltage Vref
2
and amplifies the voltage difference to generate a second error output signal SG
5
, which is provided to the PWM comparison circuit
16
. An increase in the potential of the second voltage signal SG
4
decreases the potential of the second error output signal SG
5
, and a decrease in the potential of the second voltage signal SG
4
increases the potential of the second error output signal SG
5
.
The third error amplifying circuit
15
has an inverting input terminal, which is provided with the output voltage Vout
2
, and a non-inverting input terminal, which is provided with a third reference voltage Vref
3
. The third error amplifying circuit
15
compares the output voltage Vout
2
with the third reference voltage Vref
3
and amplifies the voltage difference to generate a third error output signal SG
6
, which is provided to the PWM comparison circuit
16
. An increase in the voltage Vout
2
decreases the potential of the third error output signal SG
6
, and a decrease in the output voltage Vout
2
increases the potential of the third error output signal SG
6
.
The PWM comparison circuit
16
has a first non-inverting input terminal which receives the first error output signal SG
3
, a second non-inverting input terminal which receives the second error output signal SG
5
, a third non-inverting input terminal which receives the third error output signal SG
6
, and an inverting input terminal which receives a triangular wave signal SG
7
from the triangular wave oscillating circuit
17
.
Among the first, second, and third error output signals SG
3
, SG
5
, SG
6
, the PWM comparison circuit
16
selects the signal having the lowest level and compares the selected signal with the triangular wave signal SG
7
. When the triangular wave signal SG
7
is greater than the selected signal, the PWM comparison circuit
16
provides a duty control signal SG
8
having a low level to the output circuit
18
. When the triangular wave SG
7
is smaller than the selected signal, the PWM comparison circuit
16
outputs a duty control signal SG
8
having a high level to the output circuit
18
. The output circuit
18
inverts the duty control signal SG
8
, and provides the output signal (inverted duty control signal) SG
1
to the gate of the output transistor
3
. The output transistor
3
is activated and deactivated in response to the output signal SG
1
and thus, maintains the supply current I
0
, the charging circuit I
2
, and the output voltage Vout
2
at predetermined values.
More specifically, if, for example, the supply current I
0
of the AC adapter
4
increases, the potential of the first v

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