Patent
1992-10-15
1994-08-23
Shaw, Dale M.
395115, G06F 1562
Patent
active
053414713
ABSTRACT:
An image memory controller having a first address signal generating unit generating a first address signal in response to a state signal representing the operational state of a printer. The first address signal corresponds to a location in an image memory. A second address signal generating unit generates a second address signal for refreshing the image memory and a third address signal generating unit generates a third address signal used for rewriting at least part of data stored in the image memory. An address signal selector selectively delivers any of the first, second, and third address signals to the image memory.
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Takeda Hiroshi
Yamazaki Hideki
Yokota Yoshikazu
Hitachi , Ltd.
Shaw Dale M.
Tung Kee M.
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