Controlled turn-off power semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Regenerative type switching device – Five or more layer unidirectional structure

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257133, 257138, 257146, H01L 2974, H01L 2978

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active

056252030

ABSTRACT:
A controlled turn-off power semiconductor device is proposed which is subdivided into unit cells and which comprises five layers in a p-n-p-n-p sequence, namely a p-type emitter layer (9), an n-type base layer (8), a p-type base layer (7), an n-type emitter layer (6) and a p-doped contact region (5) between an anode (a) and a cathode (K). In every unit cell a first MOSFET (M1) which can be driven via a first insulated gate (G1) is provided on the cathode side for switching between the five-layer structure and a conventional thyristor four-layer structure. Further, a breakdown between the contact region (5) and the n-type emitter layer (6) is prevented during turning-off. As a result of the switchable five-layer structure, a current filamentation is effectively avoided during turning-off.

REFERENCES:
patent: 4581543 (1986-04-01), Herberg
patent: 4914496 (1990-04-01), Nakagawa et al.
Proceedings of PESC, 398-406 pp., Jun. 11-Jun. 14, 1990, IEEE, San Antonio, TX, K. Lijia, et al., "Onset of Current Filimentation in GTO Devices".
IEEE Transaction on Electron Devices, vol. ED-33, No. 10, 1609-1618 pp., Oct. 1986, IEE, New York, NY, US, V.A.K. Temple, "MOS-Controlled Thyristors--A New Class of Power Devices".

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