Controlled solder interdiffusion for high power semiconductor la

Details Controlled solder interdiffusion for high power semiconductor la Controlled solder interdiffusion for high power semiconductor la

1996-06-27

2000-02-22

Fahmy, Wael

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

438614, 438615, 438661, H01L 23488

Patent

active

060279575

ABSTRACT:
A method and a resulting device for mounting a semiconductor to a submount by depositing a first layer of a first metal solder having a selected first melting point and corresponding thickness onto a surface of the semiconductor. Depositing a second layer of a second metal solder having a selected second melting point higher than the first melting point and a corresponding selected thickness onto a surface of the submount. Disposing the semiconductor surface and submount surface in confronting intimate contact and heating the submount and semiconductor to a temperature greater than the first temperature and lower that the second temperature for initiating and promoting liquid interdiffusion between the first and second solders.

REFERENCES:
patent: 4169059 (1979-09-01), Storms
patent: 4360965 (1982-11-01), Fujiwara
patent: 4389557 (1983-06-01), Deveni et al.
patent: 4529836 (1985-07-01), Powers et al.
patent: 4645116 (1987-02-01), Henein et al.
patent: 4645166 (1987-02-01), Henein et al.
patent: 4759490 (1988-07-01), Ochiai
patent: 4904610 (1990-02-01), Shyr
patent: 4930001 (1990-05-01), Williams
patent: 5046656 (1991-09-01), Schmitt et al.
patent: 5106009 (1992-04-01), Humpston et al.
patent: 5121871 (1992-06-01), Beavis et al.
patent: 5221038 (1993-06-01), Melton et al.
patent: 5234153 (1993-08-01), Bacon et al.
patent: 5242099 (1993-09-01), Ueda
patent: 5372295 (1994-12-01), Abe et al.
patent: 5448014 (1995-09-01), Kong et al.
patent: 5529852 (1996-06-01), Sasame et al.
patent: 5542602 (1996-08-01), Gaynes et al.
patent: 5816473 (1998-10-01), Nishikawa et al.
patent: 5854087 (1998-12-01), Kurata
Bernstein, "Semiconductor Joining by the Solid-Liquid-Interdiffusion (SLID) Process: 1 Ag-In , Au-In, and Cu-In", Journal of the Electrochemical Society, vol. 113, No. 12, pp. 1282-1288, Dec. 1966.
R. Boudreau et al., "Fluxless Die Bonding for Optoelectronics", 1993, IEEE, pp. 485-490.

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