Controlled phase off-set digital test system

Pulse or digital communications – Repeaters – Testing

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Details

328 55, 328 63, 328134, 375118, H03L 700, H03K 526

Patent

active

044954689

ABSTRACT:
In the testing of a digital test system (e.g. the automatic testing of a digital integrated semiconductor circuit) it is necessary to provide a plurality of clock signals (periodic pulse signals), each with a definite phase relationship to a particular clock signal called the "reference". For example, when the clock signals are all in the same phase they define a common wavefront without skew. The present invention produces a clock output signal that is offset in phase with respect to the reference according to a phase offset control signal by feeding the clock input to a voltage controlled variable phase shifter, comparing the shifted clock output signal with the reference to produce an output representative of the phase difference that is fed to a negative feedback circuit that controls the variable phase shifter and means are provided in the feedback circuit for modifying the feedback according to the offset control signal so that the clock output phase offset is proportional to the offset control signal when the system is in equilibrium.

REFERENCES:
patent: 3293559 (1966-12-01), Howard et al.
patent: 4095186 (1978-06-01), Vesel
patent: 4216544 (1980-08-01), Boleda et al.
patent: 4290022 (1981-09-01), Puckette

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