Controlled method of operating a programmable controller with a

Details Controlled method of operating a programmable controller with a Controlled method of operating a programmable controller with a

1992-06-30

1995-04-04

Heckler, Thomas M.

Boots, shoes, and leggings

364DIG2, 36492693, 364949, G06F 1546

Patent

active

054044561

DESCRIPTION:

BRIEF SUMMARY
TECHNICAL FIELD

The present invention relates to a programmable controller, and particularly relates to control on a system which is in a relationship of subordination to a certain system.


BACKGROUND ART

In a conventional programmable controller (hereinafter abbreviated to "PC"), for example, as disclosed in Japanese Patent Post-Examination Publication No. Hei-1-50923, stage numbers, logical operations, data operation commands, timer commands, etc. have been provided so that judgment is made as to whether a status of a stage in question is set or reset so as to make control on every controlled unit specified by the stage.
However, in the case of controlling stages (lower-level stages) of a system which is in a relationship of subordination to a certain stage (higher-level stage), for example, in the case where lower-level stages are naturally reset when a higher-level stage is in a reset state, it is necessary to provide commands to reset the respective lower-level stages individually. In that case, stage numbers of the lower-level stages have no rules and are scattered, and the number thereof is so large that it has been apt to make a mistake at the time of stating a command. Further, there has been a problem that it is difficult to understand the relationship of subordination at a glance of a program.


DISCLOSURE OF THE INVENTION

The present invention has been attained to solve the foregoing problems and an object thereof is to provide a PC in which it is possible to make control commands for lower-level stages easily, it is also possible to grasp a relationship of subordination, and it is further possible to realize a multi-level configuration.
According to an aspect of the present invention, the PC comprises a stage table for storing statuses of respective stages and macro-blocks respectively, an I/O table for storing input/output data, a register for storing a master reset flag for a stage, a result register for storing results of operation, a program storage unit for storing a user program, and an operation control unit for analyzing and executing the user program, the program storage unit storing at least a higher-level program including the following commands (A) and (B), and programs for a first lower-level macro-block including the following programs (C), (D) and (E): obtaining an AND logic between an inverted signal of a master reset flag for a stage and a status of a corresponding stage, and a group of various commands each stated after a stage command SG, a program of each of the various commands being executed when a status of the corresponding stage is set; macro-block number are stated, and each of which is for obtaining an AND logic between an inverted signal of a master reset flag for a stage and the status of the stage, and for setting a result of the ANDing into the status of the stage as well as into the status of the macro-block; program of a macro-block, and is for resetting a master reset flag for a stage and for setting the status of the stage command SG stated next thereto when the status of the macro-block is set; of a macro-block, and is for resetting the status of the macro-block when the result register is set; and commands MLBL and the macro-end commands MEND.
In the PC according to another aspect of the present invention, the programs for the first lower-level macro-block include the programs of the commands 1B), and the programs for a second lower-level macro-block include the programs (C), (D) and (E). The status of a third macro-block is controlled by the programs for the first lower-level macro-block. That is, a second lower-level macro-block controlled by the first-lower level macro-block can be obtained, so that the programs are of a three-level configuration.
Further, in the PC according to another aspect of the present invention, the program storage unit stores programs for macro-blocks of a plurality of lower-levels including contents similar to the programs for the second lower-level macro-block, and-the statuses of those lower-level macro-blocks are controll

REFERENCES:
patent: 4648064 (1987-03-01), Morley

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