Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame
Reexamination Certificate
2001-11-13
2003-06-10
Clark, Jasmine J B (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
C257S787000, C257S691000, C257S678000, C361S813000
Reexamination Certificate
active
06576983
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention is generally in the field of semiconductor packaging. More specifically, the invention is in the field of leadframe packaging.
2. Background Art
A leadframe is used in the fabrication of semiconductor die molded packages and is usually formed from a metal such as copper and includes a paddle which might be secured to the body of the leadframe by, for example, a number of tie bars. The paddle is usually situated at the center of the leadframe. The leadframe also usually comprises a number of leads which are secured to the frame. In an “exposed” paddle leadframe based molded package, the bottom of the paddle is not encapsulated by the molding compound. The metal on the bottom of the paddle of the leadframe is left exposed in order to attach the bottom of the paddle to the printed circuit board during a re-flow solder process.
A die is attached to the top surface of the paddle in a manner known in the art. Respective first ends of bond wires are then bonded to respective die bonding pads. Respective second ends of each bond wire are then spanned to respective inner leads in the leadframe and bonded thereto for making the desired electrical connections. In a subsequent stage of the assembly process, the leadframe is placed in a transfer molding machine and the entire die, bond wires, die bonding pads, and top surface of the paddle are encapsulated in a molding compound.
A leadframe is not typically used in the packaging of high speed applications, such as multi Gigabyte/sec (Gb/s) applications, due to the lack of impedance control and high parasitics of the leadframe leads. Instead, ball grid array (BGA) or flip chip packages are typically used for multi Giga-Hertz (GHz) applications that require controlled impedance for chip-substrate-pin interconnects. Both these existing techniques, i.e. BGA and flip chip packages, are however expensive solutions compared to using a leadframe with an exposed paddle.
If the impedance of interconnect structures are not controlled, then electrical discontinuities, in the form of impedance mismatches, will exist at the interfaces between different interconnect structures. An electrical discontinuity caused by an interconnect structure, which can be thought of as an electrical discontinuity in a transmission line, may have a considerable adverse impact on signal propagation. When a signal enters a transmission line, a portion of the signal might be reflected unless there is a perfect impedance match between the output impedance of the source of the signal and the input impedance of the transmission line. The magnitude of the signal.reflection is proportional to the degree of impedance mismatch. To determine if a particular interconnect structure should be considered a transmission line, the wavelength of the signal propagating through the interconnect structure is compared to the electrical length of the interconnect structure.
Generally, the signal wavelength should be considerably longer than the electrical length of the interconnect structure, or else the interconnect structure must be treated as a transmission line. An approximation used by engineers is that if the electrical length of the interconnect structure is greater than one-tenth ({fraction (1/10)}) of a given signal wavelength, then the interconnect structure must be treated as a transmission line and an electrical discontinuity is considered to have a significant impact on the signal propagation.
Since the wavelength of a signal through a particular medium is given by the speed of light through that medium divided by the signal frequency, it follows that the signal wavelength decreases with higher frequency signals. As the signal wavelength decreases with higher signal speeds, the maximum electrical length that an interconnect structure can have before it is considered a transmission line also decreases. In the case of broadband applications involving high speed data transmission, signal reflection is of particular concern because electrical lengths of interconnect structures might be too great compared to signal wavelengths and, as such, the problem of impedance mismatches, i.e. electrical discontinuities, is aggravated.
With respect to packaging methods for high speed applications, a conventional leadframe is not desirable because the leadframe leads often act as transmission lines that produce an undesirable level of signal reflection and thereby adversely affect quality and speed of signal propagation. The use of a leadframe, however, offers a considerable cost advantage compared to existing packaging methods for high speed applications, such as BGA or flip chip packages.
Thus there is need for a leadframe based package for high speed data transmission applications.
SUMMARY OF THE INVENTION
The present invention is directed to controlled impedance leads in a leadframe for high frequency applications. The invention addresses and resolves the need in the art for a leadframe based package for high speed data transmission applications.
In one embodiment, the invention comprises a printed circuit board having a cavity formed within the printed circuit board. A leadframe having a leadframe paddle and at least one lead is situated with the cavity. The leadframe might be, for example, an exposed paddle leadframe. In one embodiment, the at least one lead is flush with the top surface of the printed circuit board. A reference plane is situated within the printed circuit board at a predetermined distance below the at least one lead in a manner so as to result in a controlled impedance of the at least one lead. The reference plane can be any plane with a constant DC voltage and no AC component, such as a ground plane.
In one embodiment, the exposed paddle is attached to the ground plane. In one embodiment, the cavity containing the leadframe paddle and a portion of the at least one lead are encased in a mold compound. A total lead length of the at least one lead consists of an encased lead length and a free space lead length. By controlling the predetermined distance, the dielectric constant of the mold compound, the dielectric constant of the printed circuit board, the total lead length, the encased lead length, and the free space lead length of the at least one lead, the invention results in a controlled impedance of the at least one lead.
REFERENCES:
patent: 4866571 (1989-09-01), Butt
patent: 6469321 (2002-10-01), Arndt
patent: 4-312963 (1992-11-01), None
patent: 5-335434 (1993-12-01), None
Fazelpour Siamak
Hashemi Hassan S.
Clark Jasmine J B
Farjami & Farjami LLP
Skyworks Solutions Inc.
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