Controlled bus reselection interface and method

Details Controlled bus reselection interface and method Controlled bus reselection interface and method

1994-11-09

1998-02-03

Kriess, Kevin A.

395303, 395726, G06F 1342

Patent

active

057154066

ABSTRACT:
The present invention provides a method and apparatus for dynamically modifying the priority of access to a bus, where the bus has control and arbitration functions distributed among the devices coupled to the bus, with each device having a fixed priority level. Access to the bus by particular devices is selectively inhibited, preventing them from asserting their fixed priority level. In a preferred embodiment, the present invention provides control over the reselection of a SCSI bus by a plurality of SCSI devices coupled to the bus by providing a pseudo busy signal to SCSI devices from which reselection is not desired. In this fashion, an initiator may issue a plurality of commands to the SCSI devices and control the order in which the devices will be serviced when ready. A plurality of pseudo busy circuits are provided, with one coupled to each device on the bus. Each pseudo busy circuit is controlled by a control signal from the initiator. The pseudo busy circuit intercepts the busy line of the SCSI bus and provides a pseudo busy signal to the busy line input of the device when instructed by the initiator, although this requires additional control lines in conjunction with the SCSI bus, it allows the use of standard peripherals connectors and controllers designed for the SCSI bus.

REFERENCES:
patent: 4463445 (1984-07-01), Grimes
patent: 4488218 (1984-12-01), Grimes
patent: 4791563 (1988-12-01), Kling
patent: 4849929 (1989-07-01), Timsit
patent: 4864532 (1989-09-01), Reeve et al.
patent: 4870643 (1989-09-01), Bultman et al.
patent: 5023891 (1991-06-01), Johnson, III
patent: 5140592 (1992-08-01), Idleman et al.
patent: 5146574 (1992-09-01), Gajjar et al.
patent: 5166939 (1992-11-01), Jaffe et al.
patent: 5175537 (1992-12-01), Jaffe et al.
patent: 5185876 (1993-02-01), Nguyen et al.
patent: 5195100 (1993-03-01), Katz et al.
patent: 5202856 (1993-04-01), Glider et al.
patent: 5204951 (1993-04-01), Keener et al.
patent: 5212785 (1993-05-01), Powers et al.
patent: 5214778 (1993-05-01), Glider et al.
patent: 5226010 (1993-07-01), Glider et al.
patent: 5233618 (1993-08-01), Glider et al.
patent: 5274645 (1993-12-01), Idleman et al.
patent: 5315708 (1994-05-01), Eidler et al.
patent: 5325497 (1994-06-01), Jaffe et al.
patent: 5349686 (1994-09-01), Gajjar et al.
patent: 5359320 (1994-10-01), Jaffe et al.
patent: 5361063 (1994-11-01), Jaffe et al.
patent: 5361347 (1994-11-01), Glider et al.
patent: 5386548 (1995-01-01), Nguyen et al.
patent: 5388228 (1995-02-01), Heath et al.
patent: 5388243 (1995-02-01), Glider et al.
Muntz et al. (1990) "Performance Analysis of Disk Arrays Under Failure" UCLA Computer Science Department.
Seagate Product Catalog "Arrayed Disc Subsystem," Array Products Group, Boulder, CO .COPYRGT.1988.

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