Multiplex communications – Wide area network – Packet switching
Patent
1994-08-01
1995-11-14
Safourek, Benedict V.
Multiplex communications
Wide area network
Packet switching
370 61, 34082579, H04L 1256
Patent
active
054673470
ABSTRACT:
An asynchronous transfer mode (ATM) switch in which access to a switchcore matrix is monitored and controlled through the logic and buffering functions of switchports connected thereto. The switchcore is greatly simplified by moving the logic and buffering functions to the switchports. The switchcore matrix comprises a plurality of rows, columns, and crosspoints thereof, providing routing paths for the routing of information cells from input points to output points on the matrix. Single-cell buffers in the switchcore matrix enable temporary storage and hand-off of individual information cells as they pass through the matrix. The simplicity of the switchcore matrix enables it to be constructed on a single integrated circuit.
REFERENCES:
patent: 4692917 (1987-09-01), Fujioka
patent: 4973956 (1990-11-01), Lin et al.
patent: 5038343 (1991-08-01), Lebizay et al.
patent: 5079762 (1992-01-01), Tanabe
patent: 5126999 (1992-06-01), Munter et al.
patent: 5128931 (1992-07-01), Yamanaka et al.
patent: 5140582 (1992-08-01), Tsuboi et al.
patent: 5144293 (1992-09-01), Rouse
patent: 5150358 (1992-09-01), Punj et al.
William E. Stephens, Martin DePrycker, Fouad A. Tobagi and Takehiko Yamaguchi; "Large-Scale ATM Switching Systems for B-ISDN"; IEEE Journal, vol. 9, No. 8, Oct. 1991, pp. 1157-1160.
H. Jonathan Chao; "A Recursive Modular Terabit/Second ATM Switch"; IEEE Journal, vol. 9, No. 8, Oct. 1991, pp. 1161-1172.
Fouad A. Tobagi, Timothy Kwok and Fabio M. Chiussi; "Architecture, Performance, and Implementation of the Tandem Banyan Fast Packet Switch"; IEEE Journal, vol. 9, No. 8, Oct. 1991, pp. 1173-1193.
Shigeo Urushidani; "Rerouting Network: A High-Performance Self-Routing Switch for B-ISDN"; IEEE Journal, vol. 9, No. 8, Oct. 1991, pp. 1194-1204.
Shih-Chian Yang and John A. Silvester; "A Reconfigurable ATM Switch Fabric for Fault Tolerance and Traffic Balancing"; IEEE Journal, vol. 9, No. 8, Oct. 1991, pp. 1205-1217.
Arata Itoh; "A Fault-Tolerant Switching Network for B-IDSN"; IEEE Journal, vol. 9, No. 8, Oct. 1991, pp. 1218-1226.
Thomas C. Banwell, Renee C. Estes, Sarry F. Habiby; Gary A. Hayward; Thomas K. Helstern, Gail R. Lalk, Derek D. Mahoney, Donald K. Wilson and Kenneth C. Young, Jr.; "Physical Design Issues for Very Large ATM Switching Systems"; IEEE Journal, vol. 9, No. 8, Oct. 1991, pp. 1227-1238.
Takahiko Kozaki, Noboru Endo, Yoshito Sakurai, Osamu Matsubara, Masao Mizukami and Kenichi Asano; "32.times.32 Shared Buffer Type ATM Switch VLSI's for B-ISDN's"; IEEE Journal, vol. 9, No. 8, Oct. 1991, pp. 1239-1247.
Yasuro Shobatake, Masahiko Motoyama, Emiko Shobatake, Takashi Kamitake, Shoichi Shimizu, Makoto Noda and Kenji Sakaue; "A One-Chip Scalable 8 * 8 ATM Switch LSI Employing Shared Buffer Architecture"; IEEE Journal, vol. 9, No. 8, pp. 1248-1254.
Thomas R. Banniza, Gert J. Eilenberger, Bart Pauwels and Yves Therasse; "Design and Technology Aspects of VLSI's for ATM Switches"; IEEE Journal, vol. 9, No. 8, Oct. 1991, pp. 1255-1264.
Manolis Katevenis, Stefanos Sidiropoulos and Costas Courcoubetis; "Weighted Round-Robin Cell Multiplexing in a General-Purpose ATM Switch Chip"; IEEE Journal, vol. 9, No. 8, Oct. 1991, pp. 1265-1279.
Atsuo Itoh, Wataru Takahashi, Hiroshi Nagano, Masaru Kurisaka and Susumu Iwasaki; "Practical Implementation and Packaging Technologies for a Large-Scale ATM Switching System"; IEEE Journal, vol. 9, No. 8, Oct. 1991, pp. 1280-1288.
James N. Giacopelli, Jason J. Hickey, William S. Marcus, W. David Sincoskie and Morgan Littlewood; "Sunshine: A High-Performance Self-Routing Broadband Packet Switch Architecture"; IEEE Journal, vol. 9, No. 8, Oct. 1991, pp. 1289-1298.
Wolfgang Fischer, Oswald Fundneider, Ernst-Heinrich Goeldner and K. A. Lutz; "A Scalable ATM Switching System Architecture"; IEEE Journal, vol. 9, No. 8, Oct. 1991, pp. 1299-1307.
Haruhiko Matsunaga and Hitoshi Uematsu; "A 1.5 Gb/s 8.times.8 Cross-Connect Switch Using a Time Reservation Algorithm"; IEEE Journal, vol. 9, No. 8, Oct. 1991, pp. 1308-1317.
Michael D. Schroeder, Andrew D. Birrell, Michael Burrows, Hal Murray, Roger M. Needham, Thomas L. Rodeheffer, Edwin H. Satterthwaite and Charles P. Thacker; "Autonet: A High-Speed, Self-Configuring Local Area Network Using Point-to-Point Links"; IEEE Journal, vol. 9, No. 8, Oct. 1991, pp. 1318-1335.
Ioannis Stavrakakis; "Efficient Modeling of Merging and Splitting Processes in Large Networking Structures"; IEEE Journal, vol. 9, No. 8, Oct. 1991, pp. 1336-1347.
Arturo Cisneros and Charles A. Brackett; "A Large ATM Switch Based on Memory Switches and Optical Star Couplers"; IEEE Journal, vol. 9, No. 8, Oct. 1991, pp. 1348-1360.
Safourek Benedict V.
Telefonaktiebolaget LM Ericsson
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