Oscillators – Solid state active element oscillator – Transistors
Reexamination Certificate
2005-11-08
2005-11-08
Kinkead, Arnold (Department: 2817)
Oscillators
Solid state active element oscillator
Transistors
C331S074000, C331S135000, C331S17700V, C331S183000, C331S045000
Reexamination Certificate
active
06963252
ABSTRACT:
Controllable oscillator circuit comprising a regenerative loop which incorporates a cascade circuit of first and second sections each having a controllable gain and a phase shift which is 90° at the oscillation frequency, the first and second sections comprising first and second transconductance amplifiers, respectively, outputs of which are coupled to third and fourth transconductance amplifiers, which are positively fed back from the output to the input, and via first and second capacitors to inputs of the second and first gain controlled amplifiers, said first and second capacitors being coupled in parallel to first and second load resistors, respectively, a tuning control current being supplied to control inputs of the first and second transconductance amplifiers, the output of at least one of the first and second transconductance amplifiers being coupled to an amplitude detection arrangement providing a gain control current for an automatic gain control to control inputs of the third and fourth transconductance amplifiers, said first and third transconductance amplifiers of the first section having a differential pair of first and second output terminals in common, said second and fourth transconductance amplifiers of the second section having a differential pair of third and fourth output terminals in common. In order to provide an oscillator capable of generating sinusoidal signals and tuneable at lower tuning frequencies and operating at lower supply voltages than the above conventional oscillator circuit, said first and second parallel RC filters are coupled between the first and second output terminals and the third and fourth output terminals, respectively, said first to fourth output terminals being respectively coupled to first to fourth DC current paths shunting at least a substantial part of said tuning and gain control currents to a supply voltage.
REFERENCES:
patent: 4188593 (1980-02-01), Kaplan
patent: 4973920 (1990-11-01), Kasperkovitz
patent: 5093635 (1992-03-01), Kasperkovitz et al.
patent: 6064277 (2000-05-01), Gilbert
Kinkead Arnold
McDermott, Esq Robert M.
Semiconductors Ideas to Market B.V.
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