Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate
2011-01-25
2011-01-25
Le, Thong Q (Department: 2827)
Static information storage and retrieval
Addressing
Sync/clocking
C365S194000, C365S189090, C365S233110, C365S241000, C365S189060
Reexamination Certificate
active
07876640
ABSTRACT:
Memories, clock synchronization circuits, clock synchronization controller circuits, and methods for setting a voltage controlled delay of a clock synchronization circuit and tracking and recording the control voltage are disclosed. For example, a clock synchronization controller provides an initial control voltage to the voltage controlled delay during initialization of the synchronization circuit until a phase dependent control voltage stabilizes. The stable phase dependent control voltage is substituted for the initial control voltage. Following stabilization of the phase dependent control voltage, a phase detector of the clock synchronization circuit is activated. A recovery control voltage is provided by the clock synchronization controller to the voltage controlled delay during recovery of the clock synchronization from a power-saving mode until the phase dependent control voltage stabilizes.
REFERENCES:
patent: 7230495 (2007-06-01), Lee et al.
patent: 7282972 (2007-10-01), Lin
patent: 2006/0176761 (2006-08-01), Lee
patent: 2007/0205816 (2007-09-01), Kim
Dorsey & Whitney LLP
Le Thong Q
Micro)n Technology, Inc.
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