Control system for chained circuit modules

Communications: electrical – Continuously variable indicating – With meter reading

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340825830, 371 11, H04Q 100, G06F 1120

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active

048476153

DESCRIPTION:

BRIEF SUMMARY
The present invention relates to a control system for chained circuit modules. It is known to connect a plurality of circuit modules in a chain, each module being capable of performing some memory and/or data processing operation. In particular, the circuit modules may be undiced chip areas of an integrated circuit wafer and the chain of modules may be grown by actuation of electronic switching functions within the modules, as described in GB No. 1 377 859. The growth process involves testing each newly added module and a chain of a few hundred modules may take some tens of seconds to grow. It has already been proposed in GB No. 2 114 782 to store the sequence of commands necessary to set up a chain of good modules, preferably permanently in a PROM, and (after the initial growth with testing process) to set up the chain rapidly in accordance with the stored commands, whenever the device is switched on. Although this reference recognizes the desirability of keeping the control logic of a module simple, it describes circuits of considerable complexity, for reasons explained below.
A module may be regarded as composed of a function unit, which performs the memory or data processing operation proper of the unit, and the logic which responds to commands. If the control logic is complex it uses up a lot of chip area which cannot be used for the function unit. Moreover, an important consideration in the case of chained modules is the integrity of the chaining paths between modules. These include part of the control logic of each module and this part will be called the serial logic. The control logic will additionally include side-chain logic, that is to say logic which is branched off the path through which the modules are chained. Any defect in the serial logic of a module will break the chain and render the apparatus inoperable. Particularly when the modules are undiced chip area, i.e. parts of a wafer scale integration (WSI) system, there is a high premium on keeping the control logic as simple as possible. As is well known, a significant problem in WSI is avoidance of faulty modules. It is advantageous to be able to utilise the control logic (or at least the serial logic) of a faulty module even though the function unit of the module is not used, and may even be disabled, because it is faulty. The use of good control logic of otherwise faulty modules makes it possible to grow chains more efficiently and include within the chain a higher proportion of non-faulty modules than if the chain excludes a module which is in any way faulty, (which is the approach adopted in GB No. 1 377 859).
Nevertheless there will inevitably be some modules which are completely unusable and, when an unusable module is encountered, it is necesasry in GB No. 1 377 859 to retract the chain to a greater or lesser extent and try another growth pattern. This tends to leave behind short chains of good but unused modules, referred to herein as a spur of orphan modules. This problem is recognised in GB No. 2 114 782 and the solution there proposed is to allow the chain to branch so that a short chain which would otherwise have to be abandoned remains used, even although a new growth is commenced from the root of the short chain. Although the chain is said to branch, and does so in relation to the growth pattern of included modules, the data path through the modules is continuous as it is a double path which, when it leaves a module to pass to another module on an outbound path eventually returns from the other module to one module on an inbound path. The control logic necessarily involved in setting up routes for the double path which may leave and return across up to four sides of a module is unavoidably complex. Moreover the system proposed in GB No. 2 114 782 uses associative addressing of commands to the modules and each interface between adjacent modules is crossed by no less than 22 lines, of which only two are involved in the end purpose of the device (passage of data to and from the function unit). Apart from these numerous inter-mod

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Manning, Frank B. "An Approach to Highly Integrated, Computer-Maintained Cellular Arrays" IEEE Transactions on Computers, Jun. 1977, pp. 536-552.

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