Control system

Electricity: motive power systems – Plural – diverse or diversely controlled electric motors – Synchronizing or phasing control

Reexamination Certificate

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Details

C318S034000, C318S068000, C318S054000, C318S041000

Reexamination Certificate

active

07432674

ABSTRACT:
A transmission path delay is set in a shift setting register. A slave unit generates a PRE_ITP signal in response to a timing signal (ITP signal) issued by a master unit. The phase difference between this PRE_ITP signal and the ITP signal unique to the slave unit is loaded into a period modification counter. A timer corrects a reference value, outputs position/speed control period signals (SYN signals) and counts down the period modification counter with these SYN signals until the period modification counter reaches zero. Furthermore, the ITP signal unique to the slave unit is outputted every time a predetermined number of the SYN signals are outputted.

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Japanese Patent Office Action, mailed Jun. 3, 2008 and issued in corresponding Japanese Patent Application No. 2005-060863.

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