Control of page storage among three media using a single channel

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307264, 307491, 318560, 318632, 340347SY, G05B 102

Patent

active

044583222

ABSTRACT:
Digital error correcting circuitry is disclosed which processes two analog output signals from an incremental position optical encoder to correct for both offset and amplitude errors. The peak amplitude values of the analog signals are stored in a digital storage register and are used to calculate bias signals of the proper polarity and amplitude to cancel the offset errors in each of the encoder signals. The peak amplitude values are also used to generate an amplitude correction factor which is applied to one of the encoder signals to correct the peak-to-peak amplitude of that signal so that it is equal to the peak-to-peak amplitude of the other encoder signal.

REFERENCES:
patent: 3705400 (1972-12-01), Cordes, Jr.
patent: 3797300 (1974-03-01), Sato
patent: 4079302 (1978-03-01), Norton
patent: 4097860 (1978-06-01), Araseki et al.
patent: 4109189 (1978-08-01), Jacques et al.
patent: 4254469 (1981-03-01), Whitely
Prazak et al.; "Correcting Errors Digitally in Data Acquisition and Control"; Electronics; vol. 52, No. 24; Nov. 22, 1979; pp. 123-128.

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