Control of cache buffer for memory subsystem

Details Control of cache buffer for memory subsystem Control of cache buffer for memory subsystem

1987-10-02

1988-10-25

Chan, Eddie P.

Boots, shoes, and leggings

G06F 1300

Patent

active

047808080

ABSTRACT:
A solid-state cache memory subsystem configured to be used in conjunction with disk drives for prestaging of data in advance of its being called for by a host computer features a controller featuring means for establishing and maintaining precise correspondence between storage locations in the solid-state array and on the disk memory, for use in establishing a reoriented position on a disk in the event of error detection, and in order to determine when a predetermined quantity of data has been read from the disk into the cache in a staging operation.

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