Control of bottom dimension of tapered contact via...

Semiconductor device manufacturing: process – Chemical etching

Reexamination Certificate

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Details

C438S014000, C438S701000, C438S714000

Reexamination Certificate

active

10909509

ABSTRACT:
Systems and methods are described for controlling critical dimension (CD) variation at the bottom of a tapered contact via on a semiconductor substrate. The invention monitors contact vias on a wafer to detect variations in CD at the top of the via in order to facilitate selective alteration of etching component ratios in an etching process, which permits adjustment of the slope of the tapered contact vias. In this manner, the invention compensates for top CD variations to maintain desired CD at the bottom of tapered vias within a target tolerance on subsequent wafers in a wafer fabrication environment.

REFERENCES:
patent: 6431182 (2002-08-01), Rakhshandehroo et al.
patent: 6521524 (2003-02-01), Wang et al.
patent: 6555479 (2003-04-01), Hause et al.
patent: 6686270 (2004-02-01), Subramanian et al.
patent: 6767827 (2004-07-01), Okada et al.
patent: 6949203 (2005-09-01), Hsieh et al.

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