Control method for non-volatile memory

Static information storage and retrieval – Floating gate – Particular biasing

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Details

36518501, 36518526, G11C 1604

Patent

active

058838350

ABSTRACT:
In a memory cell including a floating gate, a gate insulation film and a control gate, after removing injected charges from the floating gate with tunneling currents through the gate insulation film, charges are removed from the gate insulation film by applying a pair of positive and negative voltage pulses to the control gate at least one time.

REFERENCES:
patent: 5091882 (1992-02-01), Naruke
patent: 5338952 (1994-08-01), Yamauchi
patent: 5349220 (1994-09-01), Hong
patent: 5463579 (1995-10-01), Shimoji
K. Oyama et al, "A Novel Erasing Technology for 3.3V Flash memory with 64MB Capacity and Beyond", 1992 IEEE, IEEE Int'l Electron Device Meeting (IEDM) pp. 607-610.

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