Control gate-addressed CMOS non-volatile cell that programs thro

Static information storage and retrieval – Floating gate – Particular connection

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36518529, G11C 1134

Patent

active

056151500

ABSTRACT:
An improved control gate-addressed CMOS memory cell is provided which allows for programming and erasing by tunneling through the gate oxides of the PMOS and NMOS transistors. The CMOS memory cell (400) includes a PMOS transistor (402), an NMOS transistor (403), and an NMOS pass transistor (405). A capacitor (430) has a first terminal coupled to a common floating gate (416) of the PMOS and NMOS transistors and has a second terminal coupled to a control gate node.

REFERENCES:
patent: 4885719 (1989-12-01), Brahmbhatt
patent: 5272368 (1993-12-01), Turner

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