Incremental printing of symbolic information – Thermal marking apparatus or processes – Gradational recording
Reexamination Certificate
2000-08-15
2002-11-12
Hallacher, Craig (Department: 2853)
Incremental printing of symbolic information
Thermal marking apparatus or processes
Gradational recording
Reexamination Certificate
active
06480215
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a device for controlling a thermal printing head to produce multiple levels of gradation in each dot, and relates also to a printing apparatus using the thermal printing head.
This application is based on a patent application No. Hei 11-232025 filed in Japan, the content of which is incorporated herein by reference.
2. Description of the Related Art
In printers using a thermal printing head, because each dot is responsible for creating its own shading tone, each heating element is controlled so as to vary the duration of application of heat to each heating element so that each dot can produce a required degree of tone in a printed image (or printed letter). Methods for controlling conventional thermal printing heads to produce multi-level gradation are based on one of the two control methods outlined below.
(1) Method Based on Switching Head Data as Many Times as the Gradation Levels
This method is based on the use of a thermal printing head (referred to as thermal head hereinbelow) in which each dot is given its own register containing one bit. Heat-on or heat-off instruction (“0” or “1”) is sent to the thermal head from an external device to control the heating duration for each dot. In this method, if there are 256 levels of gradation, for example, heat on/off instructions must be given at least 256 times or more to each heating element to produce appropriate levels of printed tone.
FIG. 5
shows a block diagram of an example of the circuit to provide a 1-bit register for each dot in the thermal head. In
FIG. 5
, each heating element corresponds to a dot, so that a thermal head is comprised by heating elements R
1
~R
1920
representing 1920 dots aligned to produce one line of printed dots; 15 integrated control circuits IC
1
~IC
15
, each of which controls on/off heating of 128 heating elements; and a thermister for determining the temperature of the thermal head.
As indicated in the block circuit diagram shown in
FIG. 6
, each of the integrated circuits IC
1
~IC
15
is comprised by: a 128-bit (rows) shift register containing 128 steps of D flip-flop circuits SFF
1
~SFF
128
, connected in series, for receiving data from any one of the data signals DATA
1
~DATA
15
; latching circuits comprised by D flip-flop circuits LFF
1
~LFF
128
for holding the output of each row of shift registers SFF
1
~SFF
128
; and 128 pieces of NAND gating circuits G
1
~G
128
controlled by strobe signal STROBE; so that each integrated circuit controls application of on/off voltage pulses from an electrical source VH to 128 dots according to the data (“1” or “0”) held in the register. The shift register is operated by shift clock signals CLOCK shown in
FIG. 5
, and an inverted signal produced by inverting the strobe signal STROBE in an inverter INV
1
is input in the input terminal of each of the NAND-circuits G
1
~G
128
, and an inverted signal produced by inverting the latch signal LATCH in an inverter INV
2
is input in the flip-flop circuits FF
1
~FF
128
for timing.
In the method that uses the circuits shown in
FIGS. 5
,
6
to switch the head data as many times as the number of levels to express the required degree of shading, a data string containing a set of data of 128-dots each, consisting of 128 individual bits to control on/off values of each dot, is input simultaneously (in parallel) from each of the data lines DATA
1
~DATA
15
to the respective integrated circuits IC
1
~IC
15
successively in synchronization with the clock signals. In the integrated circuits IC
1
~IC
15
, the data are shifted in the shift registers SFF
1
~SFF
128
, and when all the 128-bits are transferred into the shift registers, the bit-data in the shift registers are latched by the latching circuits LFF
1
~LFF
128
when the latch signal is “0”. When the strobe signal STROBE turns to “0”, latched data in the latching circuits are output from the integrated circuits IC
1
~IC
15
so as to apply the latched data to those thermal heads showing “1”. When the strobe signal STROBE turns to “1”, all the heating elements are switched off by the Integrated circuits IC
1
~IC
15
.
Here, fifteen data signal lines DATA
1
~DATA
15
, and output lines for clock signals, latch signal LATCH, strobe signal STROBE, thermister TH
1
are connected to the central processor device disposed within the printer (not shown).
A specific example of data transfer will be used to examined the process of data transfer in such a control device. Suppose that there are 1024-levels of gradations to be controlled at a data transfer rate of 14 MHz (frequency of clock signal CLOCK). To control 1024-levels of gradations, it is necessary for each data line to switch on/off data for each heating element in the thermal head 1024-times. The time required for printing one line is determined by the relationship between the time required to carry out 1024 steps of head-data transfer and the printer speed.
Under the conditions noted above, assume for simplicity that a clock cycle operating at 14 MHz is 72 ns (actually 71.4285 . . . ), then one step of head-data transfer requires 72 ns×128 dots=9.216 &mgr;s. To switch head-data 1024-times requires 9.216 &mgr;s×1024=9438 &mgr;s, indicating that it requires 9438 &mgr;s to transfer a set of data for one line. Therefore, even if the printer is capable of printing one line in a minimum time of 2800 &mgr;s, because the data transfer duration (9438 &mgr;s)>one line printing duration (2800 &mgr;s), it can be seen that the printing speed is determined by the speed at which the data are being transferred.
Accordingly, in the method based on successive switching of data dependent on the levels of gradation, it is necessary to transfer to the thermal head as many on/off instructions as there are levels of gradations to be expressed, therefore the printing speed is governed by the speed of transferring head-data to thermal head. To shorten the data transfer interval, the number of parallel signal lines may be increased so as to increase the number of data that can be input in each transfer step, but in such a circuit design, the number of separate input terminal required at the thermal head also increases, leading to an increase in the scale of the control circuit.
(2) Method Based on Functional Head
In this method, control functions are provided on the thermal head so that a register having a plurality of bits and a comparison circuit are provided in the thermal head for each 1-bit-data so that heat on/off can be controlled externally by counter control signals. A general circuit configuration is shown in FIG.
7
.
Thermal head shown in
FIG. 7
is comprised by 2816-members of heating elements RA
1
~RA
2816
; and 44-IC control circuits IC-A
0
~IC-A
43
, each of which controls the widths of pulses to be applied to each of the 64-pieces of heating elements according to 8-bit gradation level signals input from data signal lines DATA-
0
~DATA-
7
. Data signal lines DATA-
0
~DATA-
7
are connected in parallel to a line joining the IC control circuits IC-A
0
~IC-A
43
, and each group of 11-Integrated circuits IC-A
0
~IC-
10
, IC-A
11
~IC-
21
, IC-A
22
~IC-
32
, IC-A
33
~IC-
43
are controlled by respective control signals BE
01
, BE
02
, BE
03
, BE
04
. Read-data can be input only when the control signals BE
01
, BE
02
, BE
03
, BE
04
are at “1”.
Each of the IC control circuits IC-A
0
~IC-A
43
is provided with 64-cells of 8-bit registers, counter circuits, comparison circuits and the like so that clock signals are counted, and register selection and generation of comparison values are performed internally within the thermal head. The timing of data input/output operations is controlled by strobe signal STROBE and latch signal LATCH.
In such a method, on/off information for each gradation level of each heating element is transferred through data buses comprised by 8 lines of data signal lines DATA-
0
~DATA-
7
, as multiple bit gradation data, to each of the IC control circuits IC-A
0
~IC-A
43
. After the first gr
Mimura Takanobu
Nakamura Toshiki
Hallacher Craig
Scully Scott Murphy & Presser
Shinko Electric Co. Ltd.
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