Amplifiers – With semiconductor amplifying device – Including gain control means
Reexamination Certificate
1999-11-15
2001-06-05
Shingleton, Michael B (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including gain control means
C330S288000, C330S296000
Reexamination Certificate
active
06242983
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a control circuit employed in a bias circuit of a cascaded amplifier, especially relates to a control circuit employed in a bias circuit of a programmable gain amplifier (PGA).
2. Description of the Prior Art
The differential amplifier is utilized as the control circuit employed in a bias circuit of a programmable gain amplifier. The output voltage of the differential amplifier controls the drain current of a switch made up of the PMOS (P-type Metal Oxide Semiconductor) transistor. In addition, the magnitude of the source voltage of the PMOS transistor is fed back to one input terminal of the differential amplifier. The other input terminal of the differential amplifier is connected to the output terminal of a digital-to-analog converter. It is this feedback mechanism which controls the drain current of the PMOS switch and hereby the collector current of the current source below it.
The gain control of traditional programmable gain amplifier may be done through the control of biasing current for each gain stage. Referring to
FIG. 1
, when the traditional control circuit
10
is in operation, the control circuit
10
is electrically coupled to the programmable gain amplifier
12
to provide the bias current of the programmable gain amplifier
12
. The control circuit
10
includes the operational amplifier
14
, with the positive input terminal connected to the output terminal of the digital-to-analog converter. In addition, the output terminal of the operational amplifier
14
is connected to the gate of the transistor
16
, which is a PMOS transistor in the traditional control circuit
10
.
The source of transistor
16
is simultaneously connected to a resistor and to the negative input terminal of the operational amplifier
14
. The drain of transistor
16
is connected to base of the first bipolar transistor
18
, and then is connected to the collector of the second bipolar transistor
20
. The emitter of the second bipolar transistor
20
is coupled through a resistor to voltage V
EE
. The base of the second bipolar transistor
20
is shorted to the emitter of the first bipolar transistor
18
and then is coupled to the programmable gain amplifier
12
to provide the bias current
1
.
The conventional schematic utilized to control the current for the programmable gain amplifier has the following disadvantages. First, the stability problem arises from the feedback circuit has to be paid special attention during the design phase. Secondly, the PMOS transistor (transistor
16
) as a voltage control current source used in the conventional control circuit is operated in the triode region. The equivalent channel resistance is a nonlinear parameter which is sensitive to the process variation. In addition, the schematic diagram is more complex and needs more layout space.
SUMMARY OF THE INVENTION
As described in the prior art, the bias current of a programmable gain amplifier is controlled by a feedback mechanism made up of a PMOS device and a differential amplifier. The output of differential amplifier controls the turn-on condition of PMOS device whose source voltage is fed back to the amplifier input to adjust the control voltage range. The disadvantage of this feedback circuit design is that stability problem always has to be checked carefully. In addition, the PMOS transistor in the conventional control circuit is designed to operate in the triode region. The equivalent channel resistance is a non-linear parameter which easily suffers from the process variation and causes the error of control accuracy. Furthermore, the circuit layout of the prior art technique occupies more layout space because of its complexity.
The present invention is to linearly and precisely controls the biasing condition of the programmable gain amplifier. In addition, the present invention can avert the instability issue of the feed back circuit. The present invention can also minimize the error of current control caused by the process variation.
According to the purposes mentioned above, the present invention proposes a control circuit to provide bias current for a programmable gain amplifier. The control circuit according to one preferred embodiment of the present invention includes the reference voltage generating circuits, the first current generating device, and the current repeating device.
The function of the reference voltage generating circuits is to generate a reference voltage level to provide the base bias of the first current generating device and turn on the device. Thus, the first current generating device generates a first current between the collector and emitter of the device. The emitter of the first current generating device is connected to the first voltage level through a first control resistor. The first current generating device mentioned above can be made of bipolar junction transistor (BJT).
The current repeating device acts as a current mirror of the current sources in the programmable gain amplifier. The second control electrode of the current repeating device is connected to a current gain transistor and to the current repeating devices in the programmable amplifier to generate the bias current for the gain stages. The first electrode of the first current generating device and the third electrode of the current repeating device is electrically connected to a loaded current mirror. The collector current of the first current repeating device is the first repeating current. The first repeating current acts as the source current of the bias current sources in the programmable gain amplifier to generate the second repeating current, the third repeating current, and so forth. The magnitude of the second repeating current is proportional in magnitude to the first repeating current and the first current. The second repeating current is the bias current of gain stages in the programmable gain amplifier.
The first current generating device in one preferred embodiment of the present invention is a NPN BJT. The current repeating device is also a NPN BJT. The first electrode of the first current generating device is the collector of the transistor, the second electrode of the first current generating device is the emitter of the transistor, the first control electrode of the first current generating device is the base of the transistor. The current repeating transistor of the programmable gain amplifier being a current source. The current repeating transistors of the programmable gain amplifier mentioned above are NPN BJTs. The collector of the current gain transistor mentioned above is coupled to a second voltage level. The second voltage level is also coupled to the source of the field effect transistor as active load mentioned above.
REFERENCES:
patent: 5757236 (1998-05-01), Ortiz et al.
patent: 5912589 (1999-06-01), Khoury et al.
patent: 6043714 (2000-03-01), Yamamoto
Industrial Technology Research Institute
Shingleton Michael B
LandOfFree
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