Control circuit of power converter

Electric power conversion systems – Current conversion – Using semiconductor-type converter

Reexamination Certificate

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Details

C363S137000, C363S041000, C323S207000

Reexamination Certificate

active

06459601

ABSTRACT:

This application is based on Application No. 2001-320305, filed in Japan on Oct. 18, 2001, the contents of which are hereby incorporated by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a control circuit of a power converter (of the instantaneous current waveform control type), including switching elements which perform a plurality of switching operations in one cycle, for controlling the instantaneous magnitude of an output current of the power converter, and more specifically, it relates to a control circuit of a power converter such as a sinusoidal wave voltage output type inverter, including a motor driving inverter, a high power factor converter, an active filter and an LC filter.
2. Description of the Prior Art
FIG. 12
is a block diagram illustrating a known control circuit of a power converter, which is, for example, a control circuit of an inverter described in a section entitled “CURRENT CONTROL TYPE PWM INVERTER CAPABLE OF HARMONIC CONTROL AND HIGH-SPEED CURRENT RESPONSE” (pages 9-16) in “Institute of Electrical Engineers proceedings”, Vol. 12B, No. 2 (1986), and modified into a control configuration associated with the present invention.
The control circuit shown in
FIG. 12
is constructed as a current control loop for performing instantaneous current control.
In
FIG. 12
, the power converter in the form of a main circuit of a three-phase inverter
1
is comprised of a full bridge arrangement of three pairs of switching elements Tr
1
-Tr
6
, as shown in
FIG. 13
for instance.
Current sensors
10
U,
10
V and
10
W are connected with three output terminals, respectively, of the three-phase inverter
1
for detecting inverter currents IAU, IAV and IAW output from the three-phase inverter
1
.
The current sensors
10
U-
10
W constitute, together with a feedback control circuit (to be described later), a current loop for controlling the instantaneous magnitudes of the output currents IAU-IAW of the three-phase inverter
1
.
A load
2
(for instance, three-phase motor) is connected with an output side of the three-phase inverter
1
and is provided with internal inductances
21
U,
21
V and
21
W on which alternating current (AC) voltages VBU, VBV and VBW of U phase, V phase and W phase are imposed, respectively, and internal induction voltage sources
22
U,
22
V and
22
W connected with the internal inductances
21
U-
21
W, respectively.
The internal induction voltage sources
22
U-
22
W generate counter electromotive forces VBOU, VBOV and VBOW for the internal inductances
21
U-
21
W as three-phase induced voltages.
A direct current power supply
4
is connected with the three-phase inverter
1
for supplying a direct current (DC) source voltage VD to the three-phase inverter
1
.
A three-phase sinusoidal wave current instruction generation circuit
801
generates current instruction values IAU*, IAV*, and IAW* of three-phase sinusoidal waves (to be supplied from the three-phase inverter
1
) to the current loop formed on the output side of the three-phase inverter
1
.
A current deviation vector detection circuit
802
calculates a voltage deviation vector associated with the internal induction voltage sources
22
U-
22
W. A counterelectromotive force estimation circuit
803
estimates counterelectromotive forces VBOU-VBOW generated in the load
2
.
A PWM pattern table circuit
804
determines the pattern of a PWM pulse for the three-phase inverter
1
in accordance with the output signals of the current deviation vector detection circuit
802
and the counterelectromotive force estimation circuit
803
.
Adder-subtracters
851
U,
851
V and
851
W are connected with the output side of the three-phase sinusoidal wave current instruction generation circuit
801
.
The three-phase sinusoidal wave current instruction generation circuit
801
and the adder-subtracters
851
U-
851
W together constitute a current instruction generation means, and calculate current deviations (current deviation vector) &Dgr;iU, &Dgr;iV and &Dgr;iW between the current instruction values IAU*-IAW* and the inverter currents (current feedback values) IAU-IAW, respectively.
Now, reference will be made to the operation of the known control circuit of the power converter as shown in FIG.
12
and
FIG. 13
while referring to FIG.
14
through FIG.
17
.
FIG.
14
and
FIG. 15
are vector diagrams for explaining the operation of the known control circuit of the power converter.
In
FIG. 14
, there are shown eight kinds of voltage vectors V
0
-V
7
which are output according to the states of the switching elements Tr
1
-Tr
6
in the three-phase inverter
1
, and six areas [P
1
]-[P
6
] delimited by the respective voltage vectors V
0
-V
7
.
In
FIG. 15
, there are shown an area [Q
7
] indicating that a current deviation vector &Dgr;I is in an allowable range, and outer peripheral areas [Q
1
]-[Q
6
] indicating that the current deviation vector &Dgr;I (e.g., &Dgr;Ia or &Dgr;Ib) is outside the allowable range.
FIG. 16
is an explanatory view which shows switching modes k
0
-k
7
corresponding to the eight kinds of voltage vectors V
0
-V
7
, and switching states (ON/OFF) of the switching elements Tr
1
-Tr
6
in the three-phase inverter
1
in the respective switching modes.
FIG. 17
is an explanatory view which shows a matrix condition for selecting switching modes k
0
-k
7
, wherein the horizontal direction of the matrix corresponds to the current deviation vector &Dgr;I and the vertical direction thereof corresponds to counterelectromotive force vector VB, respectively.
First of all, in
FIG. 12
, the adder-subtracters
851
U-
851
W together constituting the current instruction generation means calculate current deviations &Dgr;iU-&Dgr;iW between current instruction values IAU*-IAW* generated from the three-phase sinusoidal wave current instruction generation circuit
801
, and inverter currents IAU-IAW detected by the current sensors
10
U-
10
W.
Then, the counterelectromotive force vector estimation circuit
803
estimates counterelectromotive forces VBU-VBW generated at input ends of the load
2
from the current deviations &Dgr;iU-&Dgr;iW, calculates the counterelectromotive force vector VB, and detects in which one of the areas [P
1
]-[P
6
] (see
FIG. 14
) the counterelectromotive force vector VB exists.
In addition, the current deviation vector detection circuit
802
calculates the current deviation vector &Dgr;I from the current deviations &Dgr;iU-&Dgr;iW, and detects in which one of the areas [Q
1
]-[Q
7
] (see
FIG. 15
) the current deviation vector &Dgr;I exists.
When a prescribed allowable range for the current deviation vector &Dgr;I determined according to the accuracy of the current control is set, the area [Q
7
] in
FIG. 15
shows that the current deviation vector &Dgr;I is in the allowable range.
Moreover, the areas [Q
1
]-[Q
6
] outside the area [Q
7
] shows that the current deviation vector &Dgr;I (e.g., &Dgr;Ia or &Dgr;Ib) is outside the allowable range.
The PWM pattern table circuit
804
selects the switching modes k
0
-k
7
from the areas [P
1
]-[P
6
] of the counterelectromotive force vector VB and the areas [Q
1
]-[Q
7
] of the current deviation vector &Dgr;I according to the two dimensional map of FIG.
17
.
Moreover, the PWM pattern table circuit
804
determines the switching states of the switching elements Tr
1
-Tr
6
(see
FIG. 16
) in the three-phase inverter
1
from the switching modes k
0
-k
7
.
In
FIG. 17
, in cases where the counterelectromotive force vector VB exists in the area [P
1
] for instance, the switching mode k
1
is selected if the current deviation vector &Dgr;I exists in the area [Q
1
] or [Q
5
], and the switching mode k
3
is selected if the current deviation vector &Dgr;I exists in the area [Q
2
] or [Q
3
].
In cases where the counterelectromotive force vector VB is in the are

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