Control circuit for disabling or enabling the provision of redun

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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365 96, 365200, 307219, 307303, H03K 1903, H03K 19096

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active

047148390

ABSTRACT:
A logic circuit for activating and deactivating redundant elements include a high-low-high circuit and a dynamic latch coupled to the output of the high-low-high circuit for activating the redundant elements in response to true and complement address signals. The high-low-high circuit includes a first fuse which is blown so as to enable the redundant elements and a second fuse which is blown to disable the redundant elements.

REFERENCES:
patent: 4546454 (1985-10-01), Gupta et al.
patent: 4606013 (1986-08-01), Yoshimoto
patent: 4613959 (1986-09-01), Jiang
patent: 4621346 (1986-11-01), McAdans
patent: 4651030 (1987-03-01), Mimoto
IBM Technical Disclosure Bulletin, "Reversible On-Chip Redundancy Scheme", by W. Chin and J. A. Parisi, vol. 14, No. 10, Mar. 1972.

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