Control circuit for deterministic stopping of an integrated circ

Details Control circuit for deterministic stopping of an integrated circ Control circuit for deterministic stopping of an integrated circ

1995-11-17

1999-01-26

Beausoliel, Jr., Robert W.

Excavating

371 61, 327232, 327156, G01R 3128

Patent

active

058645640

ABSTRACT:
A control circuit to stop an integrated circuit internal clock includes a signal distribution trace connected to a clock stop pipeline. The signal distribution trace creates a large phase delay signal for a first integrated circuit internal clock cycle which activates the clock stop pipeline, and a small phase delay signal for a final integrated circuit internal clock cycle that deactivates the clock stop pipeline. The clock stop pipeline includes a first circuit component to generate an intermediate stop instruction in response to a clock stop command and the large phase delay signal of the first integrated circuit internal clock cycle. The intermediate stop instruction proceeds through the clock stop pipeline in response to clock cycles following the first clock cycle. The clock stop pipeline includes a final circuit component to produce a final stop instruction when the intermediate stop instruction and the small phase delay signal of the final integrated circuit internal clock cycle are received at the final circuit component. The final stop instruction is used to lock the integrated circuit internal clock in a single digital state.

REFERENCES:
patent: 5087829 (1992-02-01), Ishibashi et al.
patent: 5289050 (1994-02-01), Ogasawara
patent: 5394024 (1995-02-01), Buckenmaier et al.
patent: 5442773 (1995-08-01), Oto
patent: 5455931 (1995-10-01), Camporese et al.
Holdbrook, et al, "MicroSparc: A Case Study of Scan Based Debug", International Test Conference Washington, D.C., Oct. 1944, pp. 70-75.
IEEE Standard Test Access Port and Boundary Scan Architecture, IEEE Std. 1149.1-1990.
Hao, Hong et al U. S. Application Ser. No. 08/379,159, filed Jan. 27, 1995 for Method and Apparatus for Fully Controllable Integrated Circuit Internal Clock.
Holdbrook et al. "microSparc: A case study of scan based debug", ITC, pp. 70-75; Oct. 1994.

Affiliated with

Also associated with

Rating

Control circuit for deterministic stopping of an integrated circ does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Control circuit for deterministic stopping of an integrated circ, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Control circuit for deterministic stopping of an integrated circ will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1455574