Control circuit for controlling an operation mode in a pseudo-st

Details Control circuit for controlling an operation mode in a pseudo-st Control circuit for controlling an operation mode in a pseudo-st

1991-05-20

1994-04-05

Lee, Benny

Static information storage and retrieval

Addressing

Sync/clocking

307465, 36523008, G11C 700

Patent

active

053011643

ABSTRACT:
A control circuit for controlling an operation mode in a pseudo-static RAM. A chip enable control circuit generates a first group of control signals in synchronism with a change in level of a chip enable signal. A second control circuit receives a chip select signal and the first group of control signals, latches a chip select signal on the basis of a signal of the first group of control signals, and generates a second control signal in accordance with the latched signal. A third control circuit controls a write enable signal with an inverted replica of the second control signal and an inverted replica of a predetermined one of the first control signals in the first group of control signals.

REFERENCES:
patent: 4827453 (1989-05-01), Sawada et al.
patent: 4841488 (1989-06-01), Sanada
patent: 4879683 (1989-11-01), Garcia
patent: 4970687 (1990-11-01), Usami et al.
patent: 4984216 (1991-01-01), Toda et al.

Affiliated with

Also associated with

Rating

Control circuit for controlling an operation mode in a pseudo-st does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Control circuit for controlling an operation mode in a pseudo-st, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Control circuit for controlling an operation mode in a pseudo-st will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-517425