Electricity: power supply or regulation systems – Output level responsive – Using a three or more terminal semiconductive device as the...
Reexamination Certificate
1999-06-24
2001-01-30
Wong, Peter S. (Department: 2838)
Electricity: power supply or regulation systems
Output level responsive
Using a three or more terminal semiconductive device as the...
C323S279000, C323S280000
Reexamination Certificate
active
06181118
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a control circuit for controlling a semi-conductor switch for selectively outputting an output voltage at two respective levels from a voltage source in response to an input signal. In particular, the invention relates to a control circuit for controlling a field effect transistor (FET) for selectively outputting an output voltage at two respective levels to an AGP bus on a PC motherboard in response to a TYPEDET signal from a sensor in a video card receiving slot on the motherboard indicating the type of video card inserted in the card receiving slot, although the invention is not so limited.
BACKGROUND TO THE INVENTION
In general, PC motherboards are provided with a video card receiving slot for receiving a video card. Originally, one type of video card was provided, and this required that a 3.3 volt supply should be applied to the terminating resistors of the AGP bus on the PC motherboard. However, more recently a second type of video card has been introduced which will operate in the same video card receiving slot but requires that a regulated 1.5 volt supply should be provided to the terminating resistors of the AGP bus on the PC motherboard, In general, a sensor is provided in the video card receiving slot for detecting the type of video card inserted in the slot. This sensor outputs a signal which, in general, is referred to as a TYPEDET signal which, when it is at zero volts indicates that a video card requiring the regulated 1.5 volt supply has been inserted in the video card slot, and when the TYPEDET signal is floating, a 3.3 volt supply is required. A control circuit is therefore required for decoding the TYPEDET signal and for selecting an output voltage at the two respective levels of 1.5 volts regulated and 3.3 volts from a voltage source for applying to the terminating resistors of the AGP bus in response to the TYPEDET signal. It is preferable that such a control circuit should be adapted to isolate the AGP bus from the voltage source during power up to avoid power up sequencing problems. A further requirement of such a control circuit may be that in the event of a control terminal of the control circuit being isolated from the TYPEDET signal and remaining unconnected to any signal, in other words, being in a floating state, the voltage applied to the terminating resistors of the AGP bus should also be 1.5 volts regulated. It is important that any such control circuit for controlling the voltage to the terminating resistors of the AGP bus in response to the various inputs should have the minimum number of terminals so that the circuit can be implemented in the form of an IC chip with the minimum number of pins. Ideally, the number of pins should not exceed five.
OBJECTS OF THE INVENTION
It is an object of the present invention to provide a control circuit for selectively controlling an output voltage at two voltage levels from a voltage source for applying to the terminating resistors of an AGP bus in response to a TYPEDET signal. It is also an object of the invention to provide a control circuit for controlling a semi-conductor switch for selectively outputting an output voltage at two voltage levels from a voltage source in response to an input signal.
SUMMARY OF THE INVENTION
According to the invention there is provided a control circuit for controlling a semi-conductor switch for selectively outputting an output voltage at two respective selectable levels from a voltage source in response to an input signal, the circuit comprising an output terminal for applying a control signal to a gating input of the semi-conductor switch for selecting the output voltage therefrom, a ground terminal for connecting the circuit to ground, a power supply terminal for connecting the circuit to a power supply voltage, a control terminal for receiving the input signal, the control terminal being adapted to be in any one of at least three states, and a feedback terminal for receiving feedback from the output voltage from the semi-conductor switch, the control circuit further comprising:
a decoding means for decoding the state of the control terminal, and
a regulating means for outputting the control signal to the output terminal, the regulating means being responsive to the decoding means for outputting the control signal at an appropriate level for selecting the voltage output level from the semi-conductor switch in response to the state of the control terminal, and being responsive to the feedback signal on the feedback terminal for regulating the output voltage from the semi-conductor switch at one of the two selectable levels.
In one embodiment of the invention in a first of the at least three states of the control terminal, the control terminal is pulled to ground, and the regulating means is responsive to the control terminal being in the first state for outputting the control signal at a level for holding the semiconductor switch switched off.
Preferably, the control terminal is adapted for receiving the input signal through a voltage dividing means, the voltage dividing means being connected between a secondary voltage supply and an input terminal for receiving the input signal and for applying the input signal to the control terminal so that the signal applied to the control terminal is a function of the secondary voltage and the input signal. Preferably, the secondary voltage lies between the power supply voltage and ground.
In another embodiment of the invention a second state of the at least three states of the control terminal corresponds to a voltage being applied to the input terminal, and the voltage on the input terminal being different to the secondary voltage, and the secondary voltage lying between the power supply voltage and the voltage on the input terminal, and a third state of the at least three states of the control terminal corresponds to the voltage on the input terminal floating.
In a further embodiment of the invention the control terminal may be in a fourth state floating, the regulating means being responsive to the control terminal being in the fourth state for outputting the control signal at a level for operating the semi-conductor switch for outputting the output voltage at one of the two selectable levels.
Preferably, the control terminal is connected to the supply voltage through a high impedance means for pulling the voltage on the control terminal to the supply voltage when the control terminal is in the fourth state,
Preferably, the regulating means is responsive to the control terminal being in the second and fourth states for outputting the control signal at the level for selecting the semi-conductor switch to output the regulated voltage.
Advantageously, the regulating means is responsive to the control terminal being in the third state for outputting the control signal at a level for selecting the semi-conductor switch to act as a low impedance switch for outputting a voltage substantially similar to the source voltage.
In one embodiment of the invention the decoding means comprises a decoder for outputting a decoded signal to the regulating means in response to the state of the control terminal, a first inverting means and a second inverting means connected in parallel between the control terminal and the decoder for determining the state of the control terminal, the inversion threshold voltage of the first and second inverting means being less than the third state voltage of the control terminal, the inversion threshold voltage of the first inverting means being less than the second state voltage of the control terminal, and the inversion threshold voltage of the second inverting means being greater than the second state voltage of the control terminal.
In a further embodiment of the invention the decoding means comprises a third inverting means connected in parallel with the first and second inverting means between the control terminal and the decoder for determining the state of the control terminal, the inverter threshold voltage of the third inverting means being less th
Clernon George Francis
Meehan Patrick
Moane Brian Anthony
Analog Devices Inc.
Laxton Gary L.
Wolf Greenfield & Sacks P.C.
Wong Peter S.
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