Electricity: power supply or regulation systems – Output level responsive – Using a three or more terminal semiconductive device as the...
Reexamination Certificate
2007-03-20
2007-03-20
Riley, Shawn (Department: 2838)
Electricity: power supply or regulation systems
Output level responsive
Using a three or more terminal semiconductive device as the...
C323S224000, C323S237000, C323S241000
Reexamination Certificate
active
11374196
ABSTRACT:
It is an object of the present invention to provide a control circuit and a control method for a current mode control type DC—DC converter capable of preventing a subharmonic oscillation even if an on-duty is not less than 50% and capable of preventing a switching frequency from fluctuating depending on an input voltage. When a high-level output signal Vo1is inputted to a reset input terminal R of a flip-flop FF, a transistor FET1is turned off. A phase comparator FC outputs a comparison result signal CONT in accordance with a phase difference between a delay signal FP and a reference signal FR. A delay circuit DLY outputs a high-level delay signal FP after the passage of a delay time DT adjusted in accordance with the comparison result signal CONT from the turn-off of the transistor FET1. The transistor FET1is turned on in accordance with an input of the high-level delay signal FP.
REFERENCES:
patent: RE38940 (2006-01-01), Isham et al.
patent: 2002-223562 (2002-08-01), None
patent: 2005-143197 (2005-06-01), None
Arent & Fox PLLC
Fujitsu Limited
Riley Shawn
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