Control channel determiner

Multiplex communications – Diagnostic testing – Determination of communication parameters

Reexamination Certificate

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Details

C370S337000, C370S347000

Reexamination Certificate

active

06363055

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to cellular telephone systems generally and to such systems which have a digital control channel in particular.
BACKGROUND OF THE INVENTION
Cellular telephone systems are known in the art and come in many flavors, each of which has a plurality of base stations spread out over the area to be serviced. Each base station can handle a multiplicity of mobile telephones (or stations) all communicating at approximately the same time.
The particular structure of the telephone system depends on the telephony standard to which it subscribes. Standards are typically promulgated by the International Telephone Union (ITU). One such standard is known as IS-136 which provides digital traffic and control channels which are organized in a time division multiplex (TDM) format with a slotted frame structure.
The frequency range in time division standards such as the IS-136 standard is divided into physical channels. Half of the physical channels are the allocated to the forward channels, which carry messages from the base station to the mobile station, and the remaining half are allocated to the reverse channels, which carry messages from the mobile station to the base station. As shown in
FIG. 1
, each physical channel is divided into time slots
10
, each of which, in turn, may be dedicated to a different logical channel, to form a TDM frame. In the IS-136 standard, each logical channel can be either a traffic channel, containing the speech of one of the communicating person or modems, or a control channel, containing information regarding the operation of one or more mobile and base station. The slotted frames are further organized into a logical structure comprised of repeating superframes and hyperframes as described in more detail hereinbelow.
FIG. 1
illustrates the slot formats
12
and
14
, respectively for the control and traffic channels in the forward, base to mobile station, direction. As can be seen, the formats are different, although not significantly so. Each format begins with a 28 bit synchronization field (SYNC) followed thereby with six other fields. The third and fifth fields are each 130 bits long and are filled with the data to be transmitted. The fourth field is 12 bits long and is encoded in both formats. In the control channel
12
, it contains a coded “SuperFrame” Phase (CSFP) value, described in more detail hereinbelow. In the traffic channel, the fourth field contains a coded Digital Verification Code (CDVCC) and the sixth field contains a coded Digital control channel Locator (CDL). The latter indicates in which channel, or time slot, the control channel is to be found.
Thus, determining the fourth field type indicates the type of channel. Furthermore, if it is a traffic channel, then the CDL value provides the channel on which to find the control channel. Since both values are encoded with the same Cyclic Redundancy Code (CRC) encoding technique and since the parity bits of the CSFP are inverted, decoding the fourth field should indicate which type of value was present. For example, if the mobile station first assumes that the field was the CDVCC field and the CRC decoding indicates an error, the mobile station can then invert the parity bits and decode the value to produce the CSFP. In many cases, the changed assumption will be correct, indicating the type of channel contained in the current time slot of interest. U.S. Pat. No. 5,606,548 discusses the above-described search method.
Unfortunately, the bits of a field might be received incorrectly. The decoding method of the DVCC or the SFP can correct one incorrectly received bit if the type of the field is known; however, if more than one bit is incorrect, the decoded field will have an incorrect value. If the type of the field is unknown, it must be assumed during the decoding. If the field bits were received correctly, the right assumption yields no error in the decoding and the type of field will be recognized. Nevertheless, if one or more bit was received incorrectly, a wrong assumption might lead to a wrong conclusion about the field type and value.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a further, non-CRC check on the decoded superframe phase value thereby to ensure that the decoded value is a superframe phase and not an incorrectly received digital verification code.
There is therefore provided, in accordance with a preferred embodiment of the present invention, a unit for determining whether or not a received channel is a control channel. The unit includes a superframe phase estimator and a state machine. The superframe phase estimator estimates the superframe phase based on elapsed time. The state machine determines the validity and the value of a decoded superframe phase field of a received time slot based on the quality of the decoding and in comparison to the estimated superframe phase. The state machine also initializes the superframe estimator.
Moreover, in accordance with a preferred embodiment of the present invention, the superframe phase estimator is a counter which increments by a predetermined amount every time slot during active operation and by the amount of time slots lapsed during a sleep period.
Finally, in accordance with a preferred embodiment of the present invention, the state machine includes an initial, non-valid state, a between state and a valid state. The initial state is achieved upon synchronization to a new channel or if the superframe phase field has not matched an estimated superframe phase value for a predetermined number N
1
of time slots. The between state is achieved after being in the initial state if the superframe phase field has been correctly received for a predetermined number N
2
of time slots or upon return from a short sleep not requiring synchronization to a new channel. The valid state is achieved after being in the between state when the superframe phase field has been equal to the estimated superframe value for a predetermined number N
3
of times and only in this state is sleep allowed. The state machine moves from the valid state to the between state or from the between state to the initial state if the superframe phase field has not matched the estimated superframe value for predetermined numbers N
4
and N
5
of time slots, respectively.


REFERENCES:
patent: 4768192 (1988-08-01), Pattavina et al.
patent: 4791652 (1988-12-01), McEachern et al.
patent: 5321727 (1994-06-01), Bonnet et al.
patent: 5603081 (1997-02-01), Raith et al.
patent: 5604744 (1997-02-01), Andersson et al.
patent: 5606548 (1997-02-01), Vayrynen et al.
patent: 5722078 (1998-02-01), Przelomiec et al.
patent: 5768276 (1998-06-01), Diachina et al.
patent: 5778316 (1998-07-01), Persson et al.
patent: 5901160 (1999-05-01), Abe et al.
patent: 454246 (1995-08-01), None
patent: WO 9715164 (1997-04-01), None
patent: WO 9715166 (1997-04-01), None

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