Continuously integrating high-resolution analog-to-digital conve

Details Continuously integrating high-resolution analog-to-digital conve Continuously integrating high-resolution analog-to-digital conve

1991-09-27

1992-05-26

Hoff, Marc

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

341156, H03M 150

Patent

active

051172275

ABSTRACT:
A continuously integrating analog-to-digital converter (ADC) calculates a digital output by integrating an input voltage over a number of time intervals using a multisloping technique to define the input voltage in terms of a slope count. A residue ADC is used in lieu of a run-down interval of the integrator to calculate the least significant bits of the ADC digital output. This is accomplished by first sampling the integrator output voltage, and then after a number of time intervals, sampling the integrator output voltage a second tune. The difference between the two residue voltages is converted into a fractional slope count by multiplication with a calibration constant. The fractional slope count can then be added to the slope count from the integrator, so that the resulting total slope count is directly proportional to the input voltage at a high resolution. Multiplication by the calibration constant may be effectuated by controlling the gain on the residue ADC with a digital-to-analog converter (DAC), or like device.

REFERENCES:
patent: 4128885 (1978-12-01), Valek et al.
patent: 4605920 (1986-08-01), Naisuler
patent: 4654635 (1987-03-01), Van de Plassche
patent: 4896155 (1990-01-01), Craiglow
patent: 4965578 (1990-10-01), Poujois

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