Continuous time ΔΣ modulator system with...

Details Continuous time ΔΣ modulator system with... Continuous time ΔΣ modulator system with...

2008-01-01

2008-01-01

Young, Brian (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Differential encoder and/or decoder

Reexamination Certificate

active

11437378

ABSTRACT:
A continuous time ΔΣ modulation system with automatic timing adjustment includes a loop filter having continuous time elements for receiving an input; and an ADC for sampling the output from the loop filter in response to an ADC clock; a DAC responsive to the output from the ADC for feeding back an input to the loop filter in response to a DAC clock; a timing measurement circuit for detecting a difference in the timing of the ADC sampling time and the DAC update time and a timing adjustment circuit responsive to the timing measurement circuit for adjusting the timing of at least one of the DAC and ADC clocks for aligning their respective update and sampling times.

REFERENCES:
patent: 5039989 (1991-08-01), Welland et al.
patent: 6512473 (2003-01-01), Sasaki
F. Henkel and U. Langmann, “Excess Loop Delay Effects in Continuous-Time Quadrature Bandpass and Sigma-Delta Modulators”, Proceedings of the 2003 International Symposium on Circuits and Systems, vol. 1, pp. 1029-1032, May 25-28, 2003.
S. Paton, et al., “A 70-mW 300-MHz CMOS Continuous-Time ΣΔ ADC wtih 15-MHz bandwidth and 11 bits of resolution” IEEE Journal of Solid-State Circuits, vol. 39, No. 7 pp. 1056-1063, Jul. 2004.
J. A. Cherry and W. M. Snelgrove, “Excess Loop Delay in Continuous-Time Delta-Sigma Modulators”, IEEE Transactions on Circuits and Systems II, vol. 46, No. 4, pp. 376-389, Apr. 1999.

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