Continuous-time analog filter having controllable gain...

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – Unwanted signal suppression

Reexamination Certificate

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Details

C327S552000, C330S303000

Reexamination Certificate

active

06791401

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a continuous-time filter, and particularly to a filter using an OTA (Operational Transconductance Amplifier) and a capacitor.
2. Description of the Background Art
Filters are one kind of circuits frequently used in electronic circuits. In some cases, however, a signal-to noise ratio of filter is detrimental by the noises generated by the filter itself so that the filter cannot be practically used. In recent years, a continuous-time filter has particularly received attention because it can be formed in an LSI structure, can operate fast and can effectively utilize properties of a continuous-time system. An OTA-C filter (also referred to as a “Gm-C” filter) using an OTA and a capacitor (C) is known as a typical example of the continuous-time filter. This filter will now be discussed as the “Gm-C filter”.
The Gm-C filter uses OTAs (Operational Transconductance Amplifier), which is a kind of operational amplifiers, as basic cells, and achieves the filter properties by an integrating operation, in which a capacitor capacitance is charged with a current varying proportionally to an input voltage and thus having linear characteristics.
FIG. 14
shows a general circuit structure of a secondary band-pass Gm-C filter using the OTAs as basic cells.
A secondary band-pass Gm-C filter
10
includes OTAs
1
-
4
and capacitors CC
1
and CC
2
.
OTAs
1
-
4
have conductances set to values of Gm
1
-Gm
4
, respectively.
FIG. 15
shows a circuit structure of one of OTAs
1
-
4
forming the Gm-C filter.
Referring to
FIG. 15
, each of OTAs
1
-
4
includes P-channel MOS transistors PT
1
and PT
2
, and N-channel MOS transistors NT
1
-NT
6
.
P- and N-channel MOS transistors PT
1
and NT
1
are connected in series between a power supply voltage VCC and a node N
0
via an output node OP. P- and N-channel MOS transistors PT
1
and NT
1
receive on their gates a control signal VCOM and a signal applied to an input node IN, respectively. P-channel MOS transistor PT
2
and N-channel MOS transistor NT
2
are connected in series between power supply voltage VCC and a node N
1
. P-channel MOS transistor PT
2
and N-channel MOS transistor NT
2
receive on their gates control signal VCOM and a signal applied to an input node IP, respectively. N-channel MOS transistors NT
3
and NT
4
are connected in parallel between nodes N
0
and N
1
, and receive on their gates signals applied to input nodes IP and IN, respectively. N-channel MOS transistors NT
5
and NT
6
are connected between node N
1
and a ground voltage GND and between node N
0
and ground node GND, respectively, and both receive on its gate a bias signal VBIAS.
Each of OTAs
1
-
3
makes a comparison between the levels of signals applied to input nodes IN and IP, and outputs a current signal from output node OP in proportion to the level difference. A bias signal VBIAS and control signal VCOM are at analog bias levels during the operation, respectively.
Referring to
FIG. 14
again, OTAs
1
-
3
are arranged in parallel, and each have an output connected to an output node N
2
. Capacitor CC
2
is connected between output node N
2
and ground voltage GND. A signal applied to output node N
2
is output as an output signal SO of secondary band-pass Gm-C filter
10
.
OTA
1
receives on its input nodes IP and IN a signal SI applied to secondary band-pass Gm-C filter
10
and reference voltage REF, respectively, and runs an output current to an output node OP electrically connected to output node N
2
. Note that the reference voltage REF is a prescribed voltage of the analog-bias level. OTA
2
receives on its input nodes IP and IN a signal applied from a node N
3
and reference voltage REF, respectively, and runs an output current to output node OP electrically connected to node N
2
. OTA
4
receives on its input nodes IP and IN rcferebce voltage REF and a signal applied to node N
2
, respectively, and runs an output current to output node OP electrically connected to node N
3
. Capacitor CC
1
is connected between ground voltage GND and node N
3
. OTA
3
receives on its input nodes IP and IN a signal applied from a node N
2
and reference voltage REF, respectively, and runs an output current to output node OP electrically connected to node N
2
. Consequently, capacitor CC
1
is charged by a current of Gm
4
. Capacitor CC
2
is charged by currents of Gml, Gm
2
and Gm
3
.
Second band-pass Gm-C filter
10
receives input signal SI, and passes an output signal SO having a frequency in a predetermined band.
In a design of the Gm-C filter, if it can be assumed that the OTA used as a basic cell has an infinite input impedance and an infinite output impedance, a Gm-C filter having ideal gain characteristics can be achieved.
In practice, although an input resistance of the OTA can be ignored in CMOS process, an output resistance is set to a finite value of up to several mega-ohms, and cannot be ignored. Therefore, a Gm-C filter exhibiting ideal gain characteristics may not be achieved.
Referring to
FIG. 15
again, an output resistance Rda of the whole OTA depends on a resistance Rds
1
between a source and a drain of P-channel MOS transistor PT
1
on the output stage and a resistance Rds
2
that can be viewed from a drain of N-channel MOS transistor NT
1
on the output stage. Output resistance Rds
1
of P-channel MOS transistor PT
1
is represented by “Rdsp”, and output resistance Rds
2
on N-channel MOS transistor NT
1
side is represented by “Rdsn×Rdsbri×gmd”. Whole output resistance Rda is equivalent to a parallel connection of output resistances Rds
1
and Rds
2
. Therefore, the resistance between output resistances Rds
1
and Rds
2
on the P- and N-channel sides which is smaller acts predominantly. Accordingly, output resistance Rda of the whole OTA can be discussed by focusing attention on either of output resistance Rds
1
or Rds
2
. Rdsp, Rdsn, Rdsbri and gmd in the above description represent a source-drain resistance of P-channel MOS transistor PT
1
, a source-drain resistance of N-channel MOS transistor NT
1
, a bridge resistance of N-channel MOS transistors NT
3
and NT
4
, and a mutual conductance of N-channel MOS transistor NT
1
, which is a differential transistor, respectively.
When P- and N-channel MOS transistors PT
1
and NT
1
operate in saturation, source-drain resistances Rdsp and Rdsn thereof (which will be generally referred to as source-drain resistances “Rds”, hereinafter) are determined by the following formula:
R



d



s
=



V



d



s
/



I



d



s
=
1
λ
·
I



d



s
(
1
)
where &lgr; is an output impedance constant, Ids is a current between source and drain.
Thus, source-drain resistance Rds can be considered as a function of the parameters &lgr; and Ids of transistor. Consequently, source-drain resistance Rds increases as the parameter &lgr; of the transistor decreases. Also, source-drain resistance Rds decreases as the parameter &lgr; of the transistor increases.
Accordingly, source-drain resistance Rds of the P- or N-channel MOS transistor varies as the parameter &lgr; is dependant on the wafer process. Therefore, the Gm-C filter cannot perform an ideal integrating operation as a whole, and the gain characteristics disadvantageously vary.
To prevent variations of gain characteristics, it may be considered to employ a manner of tuning or controlling gain characteristics by improving source-drain resistance Rds and others, which primarily determine the value of the output impedance.
In a manufacturing step, however, it is difficult to tune or control the gain characteristics by improving various elements, as characteristic variation between conductances Gm
1
-Gm
4
and variations occur in foregoing parameters Rdsp, Rdsn, Rdsbri, gmd and others in manufacturing stages.
SUMMARY OF THE INVENTION
An object of the invention is to provide a Gm-C filter, of w

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